ATmega162 datasheet(88/324 Pages) ATMEL

88 / 324 page

2513K–AVR–07/09

ATmega162/V

Pin Change Mask

• Bit 7..0 – PCINT15..8: Pin Change Enable Mask 15..8

Each PCINT15..8 bit selects whether pin change interrupt is enabled on the corresponding I/O

pin. If PCINT15..8 is set and the PCIE1 bit in GICR is set, pin change interrupt is enabled on the

corresponding I/O pin. If PCINT15..8 is cleared, pin change interrupt on the corresponding I/O

pin is disabled.

Pin Change Mask

• Bit 7..0 – PCINT7..0: Pin Change Enable Mask 7..0

Each PCINT7..0 bit selects whether pin change interrupt is enabled on the corresponding I/O

pin. If PCINT7..0 is set and the PCIE0 bit in GICR is set, pin change interrupt is enabled on the

corresponding I/O pin. If PCINT7..0 is cleared, pin change interrupt on the corresponding I/O pin

is disabled.

The mapping between I/O pins and PCINT bits can be found in Figure 1 on page 2. Note that the

Pin Change Mask Register are located in Extended I/O. Thus, the pin change interrupts are not

supported in ATmega161 compatibility mode.

Bit

65432

PCINT15

PCINT14

PCINT13

PCINT12

PCINT11

PCINT10

PCINT9

PCMSK1

Read/Write

R/W

Initial Value

00000

Bit

76543210

PCINT7

PCINT6

PCINT5

PCINT4

PCINT3

PCINT2

PCINT1

PCINT0

PCMSK0

Read/Write

R/W

Initial Value

00000000

ATmega162 Datenblatt(PDF) 88 Page - ATMEL Corporation

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