ATmega162 datasheet(25/324 Pages) ATMEL

25 / 324 page

2513K–AVR–07/09

ATmega162/V

I/O Memory

The I/O space definition of the ATmega162 is shown in “Register Summary” on page 304.

All ATmega162 I/Os and peripherals are placed in the I/O space. All I/O locations may be

accessed by the LD/LDS/LDD and ST/STS/STD instructions, transferring data between the 32

general purpose working registers and the I/O space. I/O Registers within the address range

0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these registers, the

value of single bits can be checked by using the SBIS and SBIC instructions. Refer to the

instruction set section for more details. When using the I/O specific commands IN and OUT, the

I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using

LD and ST instructions, 0x20 must be added to these addresses. The ATmega162 is a complex

microcontroller with more peripheral units than can be supported within the 64 location reserved

in Opcode for the IN and OUT instructions. For the Extended I/O space from 0x60 - 0xFF in

SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be used. The Extended I/O

space is replaced with SRAM locations when the ATmega162 is in the ATmega161 compatibility

mode.

For compatibility with future devices, reserved bits should be written to zero if accessed.

Reserved I/O memory addresses should never be written.

Some of the Status Flags are cleared by writing a logical one to them. Note that the CBI and SBI

instructions will operate on all bits in the I/O Register, writing a one back into any flag read as

set, thus clearing the flag. The CBI and SBI instructions work with registers 0x00 to 0x1F only.

The I/O and peripherals control registers are explained in later sections.

ATmega162 Datenblatt(PDF) 25 Page - ATMEL Corporation