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Datenblatt-Suchmaschine für elektronische Bauteile |
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Datenblatt-Suchmaschine für elektronische Bauteile |
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MCP3901 Datenblatt(PDF) 43 Page - Microchip Technology |
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MCP3901 Datenblatt(HTML) 43 Page - Microchip Technology |
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43 / 60 page  © 2010 Microchip Technology Inc. DS22192C-page 43 MCP3901 7.2 Modulator Output Register The MOD register contains the most recent modulator data output. The default value corresponds to an equivalent input of 0V on both ADCs. Each bit in this register corresponds to one comparator output on one of the channels. This register should be used as a read-only register. (Note 1). This register is updated at the refresh rate of DMCLK (typically, 1 MHz with MCLK = 4 MHz). See Section 5.4 “Modulator Output Block” for more details. . REGISTER 7-2: MODULATOR OUTPUT REGISTER (MOD): ADDRESS 0x06 R/W-0 R/W-0 R/W-1 R/W-1 R/W-0 R/W-0 R/W-1 R/W-1 COMP3_CH1 COMP2_CH1 COMP1_CH1 COMP0_CH1 COMP3_CH0 COMP2_CH0 COMP1_CH0 COMP0_CH0 bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 7-4 COMPn_CH1: Comparator Outputs from Channel 1 Modulator bits bit 3-0 COMPn_CH0: Comparator Outputs from Channel 0 Modulator bits Note 1: This register can be written in order to overwrite modulator output data, but any writing here will corrupt the ADC_DATA on the next three data ready pulses. |
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