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Datenblatt-Suchmaschine für elektronische Bauteile |
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Datenblatt-Suchmaschine für elektronische Bauteile |
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ZIOL2102 Datenblatt(PDF) 11 Page - List of Unclassifed Manufacturers |
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ZIOL2102 Datenblatt(HTML) 11 Page - List of Unclassifed Manufacturers |
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11 / 91 page  ZIOL2xxx – IC Family IO-Link compliant HV Line Driver IC Family Data Sheet January 31, 2012 © 2012 Zentrum Mikroelektronik Dresden AG — Rev. 2.2.1 All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The information furnished in this publication is PRELIMINARY and subject to changes without notice. 11 of 90 Symbol Parameter Min Typ 1) Max Unit Conditions WURQ Detection twurqL Lower pulse width limit of signal evaluated as IO-Link wake-up 60 68 75 µs Refer to chapter 3.3.4 twurqU Upper pulse width limit of signal evaluated as IO-Link wake-up 85 94 109 µs Refer to chapter 3.3.4 DC/DC converter 5 VOUT Output voltage Range 6) 3 15 V @ VDD_HV > Vout + 2V (step down function only) ILOAD Output load current 5 4) 50 mA Current that flows to the application and the R-Divider IPK Over current limit for output transistor 240 mA Averaged current over complete short at DCDC converter output fosc Operating frequency 2.25 2.75 MHz Vref Reference/feedback Voltage 1.225 V at FB pin in steady state ΔVOUT_Line DC Output Line Regulation 8 mV/V @Vout=5V, ILOAD = 5mA Filter: C=10µF, L=10µH DC Output Load Regulation mV/mA @Vout=3.3V 0.7 1.4 ΔVOUT_Load @Vout=15V 3.3 6.9 Filter: C=10µF, L=10µH VOUT = 5V Ripple of Output Voltage @ VDD_HV >= 24V 65 7) Vripple @ VDD_HV < 24V 25 7) mVPP Filter: C=10µF, L=10µH VOUT = 5V tstrt Settling time after POR is released 1 ms For C=10µF, L=10µH Higher C may result in higher tstrt tDLY digital delay for DC_RDY signal 45 50 55 ms If enabled in configuration η Efficiency 8) % Filter: C=10µF, L=10µH 5 The DC/DC converter is only available inside the products ZIOL2401/2402/2201/2202/2101/2102 |
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