ZIOL2102 datasheet(34/91 Pages) ETC2

34 / 91 page

ZIOL2xxx – IC Family

IO-Link compliant HV Line Driver IC Family

Data Sheet

January 31, 2012

the prior written consent of the copyright owner. The information furnished in this publication is PRELIMINARY and subject to

changes without notice.

34 of 90

The READ and WRITE

14 access is defined in the value of bit 7 (0=write; 1=read) of the 2nd byte which is called

the SHIFT byte. Bit 6:0 represent the repeat count. This value defines the number of additional consecutive bytes

to be accessed. In case of a write access the SHIFT byte following bytes are the actual data to be written into the

memory location(s). Table 3.5 illustrates the building of the SHIFT byte in using an example.

Table 3.5

Example for building the SHIFT Byte

Number of

bytes to be

accessed

SHIFT byte value

In case of a write

access

SHIFT byte value

In case of a read

access

0000 0000

1000 0000

0000 0001

1000 0001

0000 0010

1000 0010

…

0000 1111

1000 1111

If the transferred data stream of one telegram exceeds the border line of the chosen memory block, all following

accesses will be disregarded. No wrap will happen! For more details refer to Table 3.6.

Table 3.6

Valid Address and Length Combinations

Segment

Address

Length = SHIFT[6:0]

Comment

00 0000

…

00 1111

000 0000…000 1111

…

000 0000…000 0000

Configuration-register block

01 0000

…

01 1001

01 1111

000 0000…000 1111

…

000 0000…000 0101

000 0000…000 0000

Status register block

Although status registers can be accessed up to

address 31 the useful range is only up to address 25

00 0000

…

00 1110

000 0000

…

000 0000

EEPROM is directly accessible via SPI but there is

no block operation allowed

Figure 3.12 SPI Command Structure

14 Note: IC versions ZIOL2xx2 do not allow any write access.

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