ADP1055ACPZ-R7 datasheet(26/140 Pages) AD

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ADP1055

Data Sheet

Rev. A | Page 26 of 140

The LF ADC is trimmed in production and has high accuracy

over supply, voltage, and temperature; therefore, the autocorrection

loop eliminates all errors due to offsets in the high frequency

ADC. The ADP1055 assumes that the voltage on the LF ADC is

accurate and precise and changes the setpoint (or reference)

accordingly so that the VS± pins measure 1.0 V. Any additional

offset in the output voltage is due to the tolerances of the external

resistor dividers alone.

The speed of the autocorrection loop can be changed using

The autocorrection loop stores the correction value until the

ADP1055 is power cycled. When the power is turned off and

then on again, the autocorrection loop is repeated to maintain

the most accurate output voltage.

Figure 33. Output Voltage Sampling Point at Minimum

and Maximum Input Voltage

NONLINEAR GAIN/RESPONSE

To enhance the dynamic performance of the power supply

during a load transient, the nonlinear gain can be used. The

error voltage is the reference voltage minus the divided-down

output voltage by use of a resistive divider. During steady state,

this error voltage is 0 V. During a transient condition, the error

voltage is not zero and the digital compensator acts on the error

voltage and adjusts the control input to correct for the error.

This may take several switching cycles, especially during a

transition from DCM to CCM. In such cases, a boosted error

signal aids in reducing the settling time and can even avoid an

overshoot in some cases. The ADP1055 has a programmable

increase in error voltage depending on how far the absolute

error voltage is with respect to 0 V. There are four ranges: 1% to

2%, 2% to 3.5%, 3.5% to 4%, and >4%.

The nonlinear gain boost is programmable in Register 0xFE5E

and Register 0xFE29[0].

It is recommended that the loop gain of the power supply be

measured with the highest programmed gain setting. It is also

recommended that an additional gain margin of 4 dB be used

when this feature is used due to the nonlinear effect.

Figure 34. Ideal Settings for Nonlinear Gain (Highest Gain Setting

for Highest Error)

INTEGRATOR WINDUP AND OUTPUT VOLTAGE

REGULATION LOSS (OVERSHOOT PROTECTION)

The ADP1055 limits the amount of integrator gain when the

output voltage is out of regulation for a long period of time due

to any of the following:



Large reduction in input voltage



Large and sudden change in output voltage setpoint



Excessive load

The ADP1055 limits the amount of integrator gain to prevent

overshoot caused by integrator windup. When duty cycle saturation

occurs due to any of these conditions, there is an inherent lag in

the system because the integrator is the slowest element of the

feedback control path. The ADP1055 inherently prevents the

integrator gain from increasing beyond a large value, but offers

an additional layer of protection. If the output voltage is out of

regulation for more than a certain number of switching cycles,

the reference/setpoint is set to the current output voltage, and a

soft start from precharge is initiated at a rate programmed by the

VOUT_TRANSITION_RATE command (Register 0x27). This

behavior eliminates any overshoot in the output voltage. This

setting and the number of switching cycles can be programmed

in Register 0xFE4A[7:6].

ACCURATE SECONDARY OVERCURRENT

PROTECTION

The CS2 ADC is used to measure the average value of the

secondary current via the CS2± pins. The 12 MSBs of the

reading (CS2_VALUE, Register 0xFE99[13:2]) are converted

into PMBus format and compared to the configured threshold

to make a fault decision. The LSB of the reading is equal to

CS2 range/2x

where:

CS2 range is the value set in Register 0xFE4F[1:0].

x is the number of bits in Register 0xFE4B[4:3].

tSW

VRIPPLE

VIN_MIN

VIN_MAX

TIME

tSW

SAMPLE

HERE

SAMPLE

HERE

SAMPLE

HERE

–4

–3

–2

–1

–2

–1

ERROR VOLTAGE (%HF ADC FSR)

123

0xFE29[0] = 0

0xFE29[0] = 1

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