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Absolute Maximum Ratings

positive supply voltage

differential voltage between any two grounds

<200mV

analog input voltage range

digital input voltage range

output short circuit duration (one-pin to ground)

infinite

junction temperature

175°C

storage temperature range

-65°C to 150°C

lead solder duration (+240°C)

5sec

Note: Absolute maximum ratings are limiting values, to be applied individually, and

beyond which the serviceability of the circuit may be impaired. Functional

operability under any of these conditions is not necessarily implied. Exposure to

maximum ratings for extended periods may affect device reliability.

Recommended Operating Conditions

+5V ±5%

analog input voltage range

input coupling

AC

operating temperature range

-40°C to +85°C

+3.3V ±5%

analog input common mode voltage

Package Thermal Resistance

Package

θ

JA

θ

JC

48-pin CSP

39°C/W

5°C/W

Package Transistor Count

Transistor count

10,000

Ordering Information

Model

Temperature Range

Description

CLC5958SLB

-40°C to +85°C

48-pin CSP (industrial temperature range)

CLC5958PCASM

Fully loaded evaluation board with CLC5958 … ready for test.

CLC5958 Timing Diagram

Notes

PARAMETERS

CONDITIONS

TEMP

RATINGS

UNITS

NOTES

MIN

TYP

MAX

DIGITAL OUTPUT CHARACTERISTICS

VOH

IOH = 50

µA

Full

3.2

V

VOL

IOL = 50

µA

Full

0.1

V

SUPPLY CHARACTERISTICS

+25°C

260

300

mA

1

+25°C

32

40

mA

1

power dissipation

+25°C

1.4

W

+25°C

0.75

mV/V

Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are

determined from tested parameters.

1)

These parameters are 100% tested at 25°C.

2)

Harmonics and clock spurious are removed in noise

measurements.

3)

4th or higher harmonic.

4)

Low frequency dither injected in the DC to 500KHz band.

5)

Next worst clock spur is a subharmonic of fs, but not fs/8 or fs/4.

See text on spurious.

6)

See text on calibration sidebands in the application

information section.

7)

N-3

N-2

N-1

N

N

N+1

N+2

N+3

Analog

Input

ENCODE

Data

DAV

N + 1

Delay from rising edge of

ENCODE to output data

transition – nominally 6.6ns

ENCODE to rising edge of DAV

– nominally 6.6ns

Effective aperture delay

– nominally -0.2ns

CLC5958 Timing Diagram