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L9660 Datenblatt(PDF) 33 Page - STMicroelectronics

Teilenummer L9660
Bauteilbeschribung  Quad squib driver ASIC for safety application
PDF  49 Pages
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Hersteller  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
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L9660 Datenblatt(HTML) 33 Page - STMicroelectronics

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L9660
Functional description
48
Bit [D0]
Bit D0 used to report the soft reset sequence status. If valid soft reset
sequences are received, bit D0 is set to ‘1.’ Otherwise, bit D0 is set to
‘0.’ When L9660 receives valid soft reset sequences, it sends a
MISO configuration mode response containing 0x2003 in the next SPI
transmission.
Configuration mode 2
Configuration mode 2 main function is as follows:
Set the latch time for FENx input
The SPI message definition for MOSI commands and MISO responses in this mode are
defined below.
Bits [D9:D8]
Bits are used to set the period of the FEN latch timer. The L9660 has 2
independent timers. A valid FENx input starts the pulse stretch timer.
These bits set the timer duration. These values default to ‘00’ after a
POR event.
MSB
LSB
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
MOSI Command for configuration mode 2
0
0
P
R/W
0
1
Latch bits
0
0
0
0
0
0
0
0
MISO Response for configuration mode 2
0
0
P
R/W
0
1
Latch bits
0
0
0
0
0
0
0
0
Table 17. Configuration mode 2
Bit
MOSI command
MISO response
State
Description
D15
0
Mode bits
See above
D14
0
See above
D13
Odd Parity – Includes all 16 bits
Odd Parity – Includes all 16 bits
D12
0
Read (default) - When D12=’0’ bits D11 to D0
are ignored
R/W bit
1
Write – FEN latch programming
-
D11
0
-
-
D10
1
-
-
D9
-
FEN latch time
00 = 0ms (default)
01 = 128ms
10 = 256ms
11 = 512ms
Internal Stored Value FEN latch bits
D8
D7 – D0
0
-
See above



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