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UPD161622 Datenblatt(PDF) 62 Page - NEC |
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UPD161622 Datenblatt(HTML) 62 Page - NEC |
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62 / 103 page ![]() Data Sheet S15649EJ2V0DS 62 µ PD161622 (1) Stand-by sequence Operating status (normal display) ↓ IR D6 to D0 Index register RS D15 D7 D8 D0 X X X X X X X X Control register 1 assignment L X 0 0 0 0 0 0 0 ↓ R0 D7 to D0 Control register 1 RS D15 D7 D8 D0 X X X X X X X X Control register 1 setting H X X D5 0 1 0 0 0 ↓ D7: Don’t care D6: Don’t care D4: Normal display mode (not partial display mode) D3: Stand-by ON D2: 65,000-color display mode D1: Normal power mode D5 is set in accordance with the usage conditions. The source output is automatically fixed to the VSS level by stand- by, so D7 and D6 can be set to any value. Wait time 1 (tOE2RG) At least one frame period ↓ <Power supply control sequence> IR D5 to D0 Index register RS D15 D7 D8 D0 X X X X X X X X Power supply control register 1 assignment L X 0 0 1 1 0 0 1 ↓ R25 D7 to D0 Power supply control register 1 RS D15 D7 D8 D0 Power supply control register 1 setting H X D6 D5 D4 D3 0 Note 1 1 ↓ D6 to D3 are set in accordance with the usage conditions. D2: Gate driver regulator OFF D1: Power supply IC regulator ON D0: DC/DC converter ON Note This setting can be deleted from the sequence when using an IC with no regulator circuit for the gate driver. Wait time 2 (tRGRP) Although a setting of 0 ns has no negative effect in terms of the device, be sure to finalize the timing after sufficient evaluation with the LCD module. ↓ |
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