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UPD161623 Datenblatt(PDF) 22 Page - NEC |
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UPD161623 Datenblatt(HTML) 22 Page - NEC |
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22 / 83 page ![]() Data Sheet S15817EJ2V0DS 22 µµµµPD161623 5.2.4 Arbitrary address area access (window access mode (WAS)) With the µPD161623, any area of the display RAM selected by the MIN.·X/Y address registers (R8 and R10) and MAX. ⋅ X/Y address registers (R9 and R11) can be accessed. When WAS of data access control register (R5) is set to 1, the window access mode is then selected and accessed by setting only address area of the MIN. ⋅X/Y address registers and MAX.·X/Y address registers. . The address scanning setting is also valid in this mode, in the same manner as when data is normally written to the display RAM. In addition, data can be written from any address by specifying the X address register (R6) and Y address register (R7). Note that the display RAM must be accessed after setting the X address register (R6) and Y address register (R7) if the window access area has been set or changed by the MIN. ⋅ X/Y address register or MAX.⋅ X/Y address register. Figure 5 −−−−10. Example of Incrementing Address when in Window Access Mode Start point End point EFH 00H AFH 00H MIN. X address . MIN. Y address . MAX. Y address . MAX. X address . . . . Cautions 1. When using the window access mode, the relationship between the start point and end point shown in the table below must be established. Item Address Relationship X address 00H ≤ MIN.⋅X address ≤ X address (R6) ≤ MAX.⋅X address ≤ AFH Y address 00H ≤ MIN.⋅Y address ≤ Y address (R7) ≤ MAX.⋅Y address ≤ EFH 2. If invalid address data is set as the MIN./MAX. ⋅⋅⋅⋅ address, operation is not guaranteed. 3. Do not specify any value other than the address value 2n −−−−2 (n = 1 to 88) for the X address in the high-speed RAM access mode. The operation is not guaranteed if invalid address data is set. 4. Access the display RAM after setting the X address register (R6) and Y address register (R7) if the window access area has been set or changed by the MIN. ⋅⋅⋅⋅ X/Y address register or MAX.⋅⋅⋅⋅ X/Y address register. 5 5 |
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