UPD161623 datasheet(8/83 Pages) NEC

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Data Sheet S15817EJ2V0DS

µµµµPD161623

3. PIN FUNCTIONS

3.1 Power Supply System Pins

Symbol

Pin Name

Pad No.

I/O

Function

VDD1

Logic power supply

77, 95

−

Power supply pin for logic circuit

VDD2

I/O power supply

96, 108, 109

−

Power supply pin for I/O buffer

Driver power supply

103, 104

−

Power supply pin for driver circuit

VSS

Ground

94, 97, 98, 105

−

Ground pin for logic and driver circuits

V0 to V5

VRH

VRL1, VRL2

Power supply for

γ-curve correction

120 to 125,

119,

126, 127

−

The

µ PD161623 includes power supplies and registers for the γ-curve, so if

the characteristics of the

γ-curve and LCD panel in the µ PD161623 match,

leave V0 to V5, VRH, VRL1, VRL2 open.

If some kind of correction is required, adjust the

γ-curve by connecting

registers between the V0 to V5, VRH, VRL1, VRL2 pins (see 5.9

γγγγ-Curve

Correction Power Supply Circuit).

VDD1 (MODE)

Mode setting pull-up

power supply

81, 85

−

Pull-up power supply pin for mode setting

VDD2 (MODE)

Mode setting pull-down

power supply

42, 116

−

Pull-down power supply pin for mode setting

VSS (MODE)

Mode setting ground

35, 44, 46, 48, 68,

74, 79, 83, 113,

118, 128, 140

−

Ground pin for mode setting

3.2 Logic System Pins

(1/2)

Symbol

Pin Name

Pad No.

I/O

Function

This pin is used to select the CPU interface mode.

PSX0

CPU Interface Mode

18-bit parallel interface

16-bit parallel interface

PSX0

CPU interface selection 80

Input

/CS

Chip select

Input This pin is used for chip select signals. When /CS = L, the chip is active and

can perform data input/output operations including command and data I/O.

/RESET

Reset

Input When /RESET is L, an internal reset is performed. The reset operation is

executed at the /RESET signal level. Be sure to perform reset via this pin at

power application.

/RD

(E)

Read

(Enable)

Input When i80 series parallel data transfer (/RD) has been selected, the signal at

this pin is used to enable read operations. Data is output to the data bus

only when this pin is low.

When M68 series parallel data transfer (E) has been selected, the signal at

this pin is used to enable read/write operations.

/WR

(R, /W)

Write

(Read/write)

Input When i80 series parallel data transfer (/WR) has been selected, the signal at

this pin is used to enable write operations. Data is written at the rising edge

of this signal.

When M68 series parallel data transfer (R, /W) and serial data has been

selected, this pin is used to determine the direction of data transfer.

L: Write

H: Read

C86

Select interface

Input This pin is used to switch between interface modes (i80 series CPU or M68

series CPU).

L: Selects i80 series CPU mode

H: Selects M68 series CPU mode

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