AT25SF321 datasheet(2/48 Pages) DIALOG

2 / 48 page

DS-25SF321–047F–8/2017

Features

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Single 2.5V - 3.6V Supply

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Serial Peripheral Interface (SPI) Compatible

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Supports SPI Modes 0 and 3

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Supports Dual and Quad Output Read

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104MHz Maximum Operating Frequency

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Clock-to-Output (tV) of 6 ns

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Flexible, Optimized Erase Architecture for Code + Data Storage Applications

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Uniform 4-Kbyte Block Erase

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Uniform 32-Kbyte Block Erase

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Uniform 64-Kbyte Block Erase

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Full Chip Erase

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Hardware Controlled Locking of Protected Blocks via WP Pin

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3 Protected Programmable Security Register Pages

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Flexible Programming

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Byte/Page Program (1 to 256 Bytes)

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Fast Program and Erase Times

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0.7ms Typical Page Program (256 Bytes) Time

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70ms Typical 4-Kbyte Block Erase Time

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300ms Typical 32-Kbyte Block Erase Time

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600ms Typical 64-Kbyte Block Erase Time

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JEDEC Standard Manufacturer and Device ID Read Methodology

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Low Power Dissipation

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2µA Deep Power-Down Current (Typical)

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10µA Standby current (Typical)

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4mA Active Read Current (Typical)

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Endurance: 100,000 Program/Erase Cycles

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Data Retention: 20 Years

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Complies with Full Industrial Temperature Range

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Industry Standard Green (Pb/Halide-free/RoHS Compliant) Package Options

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8-lead SOIC (150-mil and 208-mil)

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8-pad Ultra Thin DFN (5 x 6 x 0.6 mm)

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Die in Wafer Form

AT25SF321

32-Mbit, 2.5V Minimum

SPI Serial Flash Memory with Dual-I/O and Quad-IO Support

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