PCIMX6S1CVM08AB datasheet(17/169 Pages) NXP

17 / 169 page

Modules List

i.MX 6Solo/6DualLite Automotive and Infotainment Applications Processors, Rev. 9, 11/2018

NXP Semiconductors

SDMA

Smart Direct Memory

Access

System Control

Peripherals

The SDMA is multi-channel flexible DMA engine. It

helps in maximizing system performance by off-loading

the various cores in dynamic data routing. It has the

following features:

• Powered by a 16-bit Instruction-Set micro-RISC

engine

• Multi-channel DMA supporting up to 32 time-division

multiplexed DMA channels

• 48 events with total flexibility to trigger any

combination of channels

• Memory accesses including linear, FIFO, and 2D

addressing

• Shared peripherals between Arm and SDMA

• Very fast Context-Switching with 2-level priority

based preemptive multi-tasking

• DMA units with auto-flush and prefetch capability

• Flexible address management for DMA transfers

(increment, decrement, and no address changes on

source and destination address)

• DMA ports can handle unit-directional and

bi-directional flows (copy mode)

• Up to 8-word buffer for configurable burst transfers

• Support of byte-swapping and CRC calculations

• Library of Scripts and API is available

SJC

System JTAG Controller

System Control

Peripherals

The SJC provides JTAG interface, which complies with

JTAG TAP standards, to internal logic. The i.MX

6Solo/6DualLite processors use JTAG port for

production, testing, and system debugging. In addition,

the SJC provides BSR (Boundary Scan Register)

standard support, which complies with IEEE1149.1 and

IEEE1149.6 standards.

The JTAG port must be accessible during platform initial

laboratory bring-up, for manufacturing tests and

troubleshooting, as well as for software debugging by

authorized entities. The i.MX 6Solo/6DualLite SJC

incorporates three security modes for protecting against

unauthorized accesses. Modes are selected through

eFUSE configuration.

SNVS

Secure Non-Volatile

Storage

Security

Secure Non-Volatile Storage, including Secure Real

Time Clock, Security State Machine, Master Key

Control, and Violation/Tamper Detection and reporting.

SPDIF

Sony Philips Digital

Interconnect Format

Multimedia

Peripherals

A standard audio file transfer format, developed jointly

by the Sony and Phillips corporations. Has Transmitter

and Receiver functionality.

Table 2. i.MX 6Solo/6DualLite Modules List (continued)

Block Mnemonic

Block Name

Subsystem

Brief Description

PCIMX6S1CVM08AB Datenblatt(PDF) 17 Page - NXP Semiconductors

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