PCIMX6S1CVM08AB datasheet(26/169 Pages) NXP

26 / 169 page

i.MX 6Solo/6DualLite Automotive and Infotainment Applications Processors, Rev. 9, 11/2018

NXP Semiconductors

Electrical Characteristics

4.1.3

Operating Ranges

Table 8 provides the operating ranges of the i.MX 6Solo/6DualLite processors. For details on the chip's

power structure, see the “Power Management Unit (PMU)” chapter of the i.MX 6Solo/6DualLite Reference

Manual (IMX6SDLRM).

Table 8. Operating Ranges

Parameter

Description

Symbol

Min

Typ

Max1

Unit

Comment2

Run mode:

LDO enabled

VDD_ARM_IN

1.43

—

1.5

LDO Output Set Point (VDD_ARM_CAP) = 1.275 V

minimum for operation up to 996MHz.

1.2753

—

1.5

LDO Output Set Point (VDD_ARM_CAP) = 1.150 V

minimum for operation up to 792MHz.

1.253

—

1.5

LDO Output Set Point (VDD_ARM_CAP) = 1.125 V

minimum for operation up to 396MHz.

VDD_SOC_IN

1.2753,4

—

1.5

Arm

≤ 792 MHz, VPU ≤ 328 MHz:

VDD_SOC and VDD_PU LDO outputs

(VDD_SOC_CAP and VDD_PU_CAP) = 1.225 V5

maximum and 1.15 V minimum.

1.2753,

—

1.5

Arm

≤ 996 MHz, VPU ≤ 328 MHz:

VDD_SOC and VDD_PU LDO outputs

(VDD_SOC_CAP and VDD_PU_CAP) = 1.225 V5

maximum and 1.175 V minimum.

Run mode:

LDO bypassed6

VDD_ARM_IN

1.150

—

1.3

LDO bypassed for operation up to 792 MHz

1.125

—

1.3

LDO bypassed for operation up to 396 MHz

VDD_SOC_IN

1.1507

—1.215

LDO bypassed for operation VPU

≤ 328 MHz

Standby/DSM mode

VDD_ARM_IN

0.9

—

1.3

Refer to Table 11, "Stop Mode Current and Power

Consumption," on page 30.

VDD_SOC_IN

0.9

—

1.2255

V—

VDD_HIGH

internal regulator

VDD_HIGH_IN

2.8

—

3.3

Must match the range of voltages that the

rechargeable backup battery supports.

Backup battery

supply range

VDD_SNVS_IN8

2.9

—

3.3

Should be supplied from the same supply as

VDD_HIGH_IN if the system does not require

keeping real time and other data on OFF state.

USB supply

voltages

USB_OTG_VBUS

4.4

—

5.25

—

USB_H1_VBUS

4.4

—

5.25

—

DDR I/O

supply voltage

NVCC_DRAM

1.14

1.2

1.3

LPDDR2

1.425

1.5

1.575

DDR3

1.283

1.35

1.45

DDR3L

Supply for RGMII

I/O power group9

NVCC_RGMII

1.15

—

2.625

1.15 V–1.30 V in HSIC 1.2 V mode

1.43 V–1.58 V in RGMII 1.5 V mode

1.70 V–1.90 V in RGMII 1.8 V mode

2.25 V–2.625 V in RGMII 2.5 V mode

PCIMX6S1CVM08AB Datenblatt(PDF) 26 Page - NXP Semiconductors

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