AD6654SLASHPCB datasheet(26/88 Pages) AD

26 / 88 page

AD6654

Rev. 0 | Page 26 of 88

TERMINOLOGY

Analog Bandwidth

The analog input frequency at which the spectral power of the

fundamental frequency (as determined by the FFT analysis) is

reduced by 3 dB.

Differential Analog Input Resistance,

Capacitance, and Impedance

The real and complex impedances measured at each analog

input port. The resistance is measured statically, and the

capacitance and differential input impedances are measured

with a network analyzer.

Differential Analog Input Voltage Range

The peak-to-peak differential voltage that must be applied to

the converter to generate a full-scale response. Peak differential

voltage is computed by observing the voltage on a single pin

and subtracting the voltage from the other pin, which is 180°

out of phase. Peak-to-peak differential is computed by rotating

the inputs phase 180° and taking the peak measurement again.

Then the difference is computed between both peak

measurements.

Encode Pulse Width/Duty Cycle

Pulse width high is the minimum amount of time that the

ENCODE pulse should be left in Logic 1 state to achieve the

rated performance. Pulse width low is the minimum time

ENCODE pulse should be left in the low state. Several internal

timing parameters are a function of tENCL and tENCH, optimum

performance will be achieved with 50/50 duty cycle.

Harmonic Distortion, Second

The ratio of the rms signal amplitude to the rms value of the

second harmonic component, reported in dBc.

Harmonic Distortion, Third

The ratio of the rms signal amplitude to the rms value of the

third harmonic component, reported in dBc.

Full-Scale Input Power

Expressed in dBm. Computed using the following equation:

⎟

⎠

⎞

⎜

⎝

⎛

001

log

INPUT

SCALE

FULL

SCALE

FULL

Power

RMS

Minimum Conversion Rate

The encode rate at which the SNR of the lowest analog signal

frequency drops by no more than 3 dB below the guaranteed

limit.

Maximum Conversion Rate

Encode rate at which parametric testing is performed.

Noise for Any Range Within the ADC

⎟

⎠

⎞

⎜

⎝

⎛

−

dBFS

dBc

dBm

SIGNAL

SNR

NOISE

where Z is the input impedance, FS is the full scale of the device

for the frequency in question, SNR is the value for the particular

input level, and SIGNAL is the signal level within the ADC

reported in dB below full scale. This value includes both

thermal and quantization noise.

Power-Supply Rejection Ratio

The ratio of a change in input offset voltage to a change in

power-supply voltage.

Power-Supply Rise Time

The time from when the dc supply is initiated until the supply

output reaches the minimum specified operating voltage for the

AD6654, measured at the supply pin(s) of the AD6654.

Processing Gain

When the tuned channel occupies less bandwidth than the

input signal, this rejection of out-of-band noise is referred to as

processing gain. By using large decimation factors, processing

gain can improve the SNR of the ADC by 15 dB or more. Use

the following equation to estimate processing gain:

⎥

⎦

⎤

⎢

⎣

⎡

Bandwidth

Filter

Rate

Sample

Gain

Processing

log

Signal-to-Noise Ratio (Without Harmonics)

The ratio of the rms signal amplitude (set at 1 dB below full

scale) to the rms value of the sum of all other spectral

components, excluding the first five harmonics and dc.

Spurious-Free Dynamic Range (SFDR)

The ratio of the rms signal amplitude to the rms value of the

peak spurious spectral component. The peak spurious compo-

nent might, or might not be, a harmonic. SFDR can be reported

in dBc (degrades as signal level is lowered), or dBFS (always

related back to converter full scale).

Two-Tone Intermodulation Distortion Rejection

The ratio of the rms value of either input tone to the rms value

of the worst third-order intermodulation product, in dBc.

Two-Tone SFDR

Ratio of the rms value of either input tone to the rms value of

the peak spurious component. The peak spurious component

might, or might not be, an IMD product. SFDR can be reported

in dBc (degrades as signal level is lowered), or in dBFS (always

related back to converter full scale).

Worst Other Spur

Ratio of the rms signal amplitude to the rms value of the worst

spurious component (excluding the second and third harmonic)

reported in dBc.

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