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CS4525 Datenblatt(PDF) 25 Page - Cirrus Logic |
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CS4525 Datenblatt(HTML) 25 Page - Cirrus Logic |
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25 / 98 page ![]() DS726PP1 25 CS4525 DC ELECTRICAL CHARACTERISTICS AGND = DGND = PGND = 0 V; All voltages with respect to ground; PWM switch rate = 384 kHz; Unless otherwise specified. Notes: 17. Normal operation is defined as RST = HI. 18. Power-Down Mode is defined as RST = LOW with all input lines held static. 19. The DC current drain represents the allowed current from the VQ pin due to typical leakage through the electrolytic de-coupling capacitors. 20. Valid with the recommended capacitor values on FILT+ and VQ. Increasing the capacitance will increase the PSRR. DIGITAL INTERFACE SPECIFICATIONS AGND = DGND = PGND = 0 V; All voltages with respect to ground; Unless otherwise specified. Notes: 21. Digital interface signals include all pins sourced from the VD supply as shown in “Digital I/O Pin Characteristics” on page 12. Parameters Min Typ Max Units Normal Operation (Note 17) Power Supply Current VD = 3.3 V - 54 - mA Power Dissipation VD = 3.3 V - 180 - mW Power-Down Mode (Note 18) Power Supply Current VD = 3.3 V - 2.8 - mA VD_REG Characteristics Nominal Voltage 2.25 2.5 2.75 V DC current source - - 3 mA VA_REG Characteristics Nominal Voltage 2.25 2.5 2.75 V DC current source - - 1 mA VQ Characteristics Nominal Voltage - 0.5*VA_REG - V Output Impedance - 23 - k Ω DC current source/sink (Note 19) -- 10 μA Filt+ Nominal Voltage - VA_REG - V Power Supply Rejection Ratio (Note 20) 1 kHz 60 Hz - - 60 40 - - dB dB Parameters Symbol Min Max Units Digital Interface Signal Characteristics (Note 21) High-Level Input Voltage VIH 0.75*VD_REG - V Low-Level Input Voltage VIL - 0.20*VD_REG V High-Level Output Voltage Io=2 mA VOH 0.90*VD - V Low-Level Output Voltage Io=2 mA VOL -0.2 V Input Leakage Current Iin -±10 uA Input Capacitance - 8 pF PWM_SIGx Characteristics High-Level PWM_SIGx Output Voltage Io=2 mA VOHPS 0.90*VD_REG - V Low-Level PWM_SIGx Output Voltage Io=2 mA VOLPS -0.2 V |
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