ADIS16209SLASHPCBZ datasheet(4/16 Pages) AD

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ADIS16209

Preliminary Technical Data

Rev. PrA | Page 4 of 16

Parameter

Conditions

Min

Typ

Max

Unit

ON-CHIP VOLTAGE REFERENCE

2.5

Accuracy

At 25°C

−10

+10

Reference Temperature Coefficient

±40

ppm/oC

Output Impedance

DAC OUTPUT

5 kΩ/100 pF to GND

Resolution

Bits

Relative Accuracy

For Code 101 to Code 4095

LSB

Differential Nonlinearity

LSB

Offset Error

±5

Gain Error

±0.5

Output Range

0 to

2.5

Output Impedance

Output Settling Time

μs

LOGIC INPUTS

Input High Voltage, VINH

2.0

Input Low Voltage, VINL

0.8

For CS signal when used to wake up from sleep

mode

0.55

Logic 1 Input High Current, IINH

VIH = 3.3 V

±0.2

±10

μA

Logic 0 Input Low Current, IINL

VIL = 0 V

All except RST

−40

−60

μA

RST3

−1

Input Capacitance, CIN

DIGITAL OUTPUTS

Output High Voltage, VOH

ISOURCE = 1.6 mA

2.4

Output Low Voltage, VOL

ISINK = 1.6 mA

0.4

SLEEP TIMER

Timeout Period4

0.5

128

Seconds

START-UP TIME

Initial

130

Sleep Mode Recovery

2.5

FLASH MEMORY

Endurance5

20,000

Cycles

Data Retention6

TJ = 85°C

Years

CONVERSION RATE

Maximum Throughput Rate

4096

SPS

Minimum Throughput Rate

2.066

SPS

POWER SUPPLY

Operating Voltage Range

3.0

3.3

3.6

Power Supply Current

Normal mode, SMPL_PRD ≥ 0x08, 25°C

Fast mode, SMPL_PRD ≤ 0x07, 25°C

Sleep mode, at 25°C

500

750

μA

1 Guaranteed by iMEMS® packaged part testing, design, and/or characterization.

2 Self-test response changes as the square of VDD.

3 The RST pin has an internal pull-up.

4 Guaranteed by design.

5 Endurance is qualified as per JEDEC Standard 22 Method A117 and measured at −40°C, +25°C, +85°C, and +125°C.

6 Retention lifetime equivalent at junction temperature (TJ) 55°C as per JEDEC Standard 22 Method A117. Retention lifetime decreases with junction temperature.

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