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ADE9178 Datenblatt(PDF) 115 Page - Analog Devices |
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ADE9178 Datenblatt(HTML) 115 Page - Analog Devices |
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115 / 122 page ![]() Data Sheet ADE9178 REGISTER DETAILS: ADE9178 analog.com Rev. A | 115 of 122 Table 34. ADE9178 Register Details (Continued) Addr Name Bits Bit Name Settings Description Reset Access 9 AUX3DIPONE Auxiliary 3 Channel Dip Condition Detected. Set this bit to enable an interrupt when the AUX3 channel is in the dip condition and is zero when it is not in a dip condition, as calculated by RMSONE. 0x0 R/W 8 AUX2DIPONE Auxiliary 2 Channel Dip Condition Detected. Set this bit to enable an interrupt when the AUX2 channel is in the dip condition and is zero when it is not in a dip condition, as calculated by RMSONE. 0x0 R/W 7 AUX1DIPONE Auxiliary 1 Channel Dip Condition Detected. Set this bit to enable an interrupt when the AUX1 channel is in the dip condition and is zero when it is not in a dip condition, as calculated by RMSONE. 0x0 R/W 6 AUX0DIPONE Auxiliary 0 Channel Dip Condition Detected. Set this bit to enable an interrupt when the AUX0 channel is in the dip condition and is zero when it is not in a dip condition, as calculated by RMSONE. 0x0 R/W 5 CIDIPONE Phase C Current Dip Condition Detected. Set this bit to enable an interrupt when the Phase C current is in the dip condition and is zero when it is not in a dip condition, as calculated by RMSONE. 0x0 R/W 4 CVDIPONE Phase C Voltage Dip Condition Detected. Set this bit to enable an interrupt when the phase C voltage is in the dip condition and is zero when it is not in a dip condition, as calculated by RMSONE. 0x0 R/W 3 BIDIPONE Phase B Current Dip Condition Detected. Set this bit to enable an interrupt when the phase B current is in the dip condition and is zero when it is not in a dip condition, as calculated by RMSONE. 0x0 R/W 2 BVDIPONE Phase B Voltage Dip Condition Detected. Set this bit to enable an interrupt when the phase B voltage is in the dip condition and is zero when it is not in a dip condition, as calculated by RMSONE. 0x0 R/W |
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