LP5523 datasheet(17/61 Pages) TI2

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STANDBY

RESET

INTERNAL

STARTUP

SEQUENCE

Reset Register = FF

POR=H

TSD = H

NORMAL MODE

EN=H (pin) and

CHIP_EN=H (bit)

EN=L (pin) or

CHIP_EN=L (bit)

POR

TSD = L

POWER SAVE

Enter power save

Exit power save

LP5523

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SNVS550E – SEPTEMBER 2009 – REVISED JANUARY 2017

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7.4 Device Functional Modes

7.4.1 Modes Of Operation

RESET

In the RESET mode all the internal registers are reset to the default values. Reset is always

entered if Reset Register (3DH) is written FFH or internal Power-On Reset is active. Power-On

Reset (POR) activates during the chip startup or when the supply voltage VDD fall below 1.5V (typ.).

Once VDD rises above 1.5V (typ.), POR deactivates, and the device continues to the STANDBY

mode. CHIP_EN control bit is low after POR by default.

STANDBY: The STANDBY mode is entered if the register bit CHIP_EN or EN pin is LOW, and Reset is not

active. This is the low-power consumption mode, when all circuit functions are disabled. Most

registers can be written in this mode if EN pin is risen to high so that control bits are effective right

after the startup (see Control Register Details).

STARTUP:

When CHIP_EN bit is written high and EN pin is high, the INTERNAL STARTUP SEQUENCE

powers up all the needed internal blocks (VREF, bias, oscillator etc.). Startup delay is 500 μs. If the

chip temperature rises too high, the Thermal shutdown (TSD) disables the chip operation, and the

chip waits in STARTUP mode until no thermal shutdown event is present.

NORMAL:

During NORMAL mode the user controls the chip using the Control Registers.

POWER SAVE: In POWER-SAVE mode analog blocks are disabled to minimize power consumption. See

Automatic Power-Save Mode for further information.

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