L9663 datasheet(90/106 Pages) STMICROELECTRONICS

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Electrical characteristics

L9663

90/106

DS11401 Rev 6

Table 14. VAS pre regulator

Symbol

Parameter / Condition

Min

Typ

Max

Unit

VAS5DC

Regulated VAS voltage

5.3 V output selection



VSUP ≥ 5.8 V (supply of external NFET)

VASSUP ≥ 5.3 V

Static load condition: 4 mA ≤ Iload ≤ 210 mA

-2.5%

5.3

+2%

VAS7DC

Regulated VAS voltage

7.6 V output selection



VSUP > 8 V (supply of external NFET)

VASSUP ≥ 7.6V

Static load condition 4 mA ≤Iload ≤210 mA

-4%

7.6

VAS5LS

Maximum ripple on VAS output in load step

condition

5.3 V output selection



VSUPR ≥ 5.8 V (supply of external NFET)

VASSUP ≥ 5.3 V

Transient load: 0 mA to 210 mA and 210 mA

to 0 mA in 0.5 µs

-5%

VAS5DC

+5%

VAS7LS

Maximum ripple on VAS output in load step

condition

7.6 V output selection



VSUP > 8V (supply of external NFET)

VASSUP ≥ 7.6 V

Transient load: 0 mA to 210 mA and 210 mA

to 0 mA in 0.5 µs

-5%

VAS7DC

VAS

Maximum ripple voltage on the transceiver

during current modulation (dI/dt = ±60mA/ µs)

––

|2|

VVGS_RPD

VGS passive pull-down clamping structure

(device off)



Test condition: Isink = 100 µA

––

1.5

IVGS_IPD

VGS active pull-down current (regulator

disabled, VAS_EN=0, device on)

–1

1.2

–

VGS to VAS passive clamp (VAS shorted to

ground, regulator switched on)

812

Decoupling capacitor (Test info)

1.7

4.7

6.3

µF

ESRC2

ESR of decoupling capacitor (Test info)

–

0.2

VASSUPuv

VASSUP under voltage threshold for enabling

of internal charge pump

11.8

–

VASton

VAS startup timing after VAS_EN=’1’ (on by

default at POR release)

––

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