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AT80SND1C-ROTIL Datenblatt(PDF) 24 Page - ATMEL Corporation |
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AT80SND1C-ROTIL Datenblatt(HTML) 24 Page - ATMEL Corporation |
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24 / 210 page ![]() 24 AT8xC51SND1C 4109E–8051–06/03 Figure 16. Lower 128 Bytes Internal RAM Organization Upper 128 Bytes RAM The upper 128 Bytes of RAM are accessible from address 80h to FFh using only indirect addressing mode. Expanded RAM The on-chip 2K Bytes of expanded RAM (ERAM) are accessible from address 0000h to 07FFh using indirect addressing mode through MOVX instructions. In this address range, EXTRAM bit in AUXR register (see Table 29) is used to select the ERAM (default) or the XRAM. As shown in Figure 15 when EXTRAM = 0, the ERAM is selected and when EXTRAM = 1, the XRAM is selected (see Section “External Space”). The ERAM memory can be resized using XRS1:0 bits in AUXR register to dynamically increase external access to the XRAM space. Table 26 details the selected ERAM size and address range. Table 26. ERAM Size Selection Note: Lower 128 Bytes RAM, Upper 128 Bytes RAM, and expanded RAM are made of volatile memory cells. This means that the RAM content is indeterminate after power-up and must then be initialized properly. Bit-Addressable Space 4 Banks of 8 Registers R0-R7 30h 7Fh (Bit Addresses 0-7Fh) 20h 2Fh 18h 1Fh 10h 17h 08h 0Fh 00h 07h XRS1 XRS0 ERAM Size Address 0 0 256 Bytes 0 to 00FFh 0 1 512 Bytes 0 to 01FFh 1 0 1K Byte 0 to 03FFh 1 1 2K Bytes 0 to 07FFh |
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