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R8C Datenblatt(PDF) 49 Page - Renesas Technology Corp |
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R8C Datenblatt(HTML) 49 Page - Renesas Technology Corp |
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49 / 199 page ![]() R8C/10 Group Rev.1.20 Jan 27, 2006 page 39 of 180 REJ09B0019-0120 Figure 10.3 Interrupt Control Registers Symbol AddressAfter reset INT0IC 005D16 XX00X0002 Bit nameFunction Bit symbol b7b6 b5b4b3 b2b1b0 ILVL0 IR POL Interrupt priority level select bit Interrupt request bit Polarity select bit(3, 4) Reserved bit 0: Interrupt not requested 1: Interrupt requested 0 : Selects falling edge 1 : Selects rising edge Set to “0” ILVL1 ILVL2 NOTES: 1. Only "0" can be written to the IR bit. (Do not write "1"). 2. To rewrite the interrupt control register, do so at a point that does not generate the interrupt request for that register. Refer to the paragraph 19.2.6 “Changing Interrupt Control Registers” . 3. If the INTOPL bit in the INTEN register is set to “1” (both edges), set the POL bit to "0 " (selecting falling edge). 4. The IR bit may be set to “1” (interrupt requested) when the POL bit is rewritten. Refer to the paragraph 19.2.5 “Changing Interrupt Factor” . Interrupt control register(2) b7b6b5b4b3b2b1b0 Bit name Function Bit symbol RW Symbol Address After reset KUPIC 004D16 XXXXX0002 ADIC 004E16 XXXXX0002 S0TIC, S1TIC 005116, 005316 XXXXX0002 S0RIC, S1RIC 005216, 005416 XXXXX0002 INT2IC 005516 XXXXX0002 TXIC 005616 XXXXX0002 TYIC 005716 XXXXX0002 TZIC 005816 XXXXX0002 INT1IC 005916 XXXXX0002 INT3IC 005A16 XXXXX0002 TCIC 005B16 XXXXX0002 ILVL0 IR Interrupt priority level select bit Interrupt request bit 0 : Interrupt not requested 1 : Interrupt requested ILVL1 ILVL2 Nothing is assigned. When write, set to “0”. When read, its content is indeterminate. 0 0 0 : Level 0 (interrupt disabled) 0 0 1 : Level 1 0 1 0 : Level 2 0 1 1 : Level 3 1 0 0 : Level 4 1 0 1 : Level 5 1 1 0 : Level 6 1 1 1 : Level 7 b2b1b0 0 0 0 : Level 0 (interrupt disabled) 0 0 1 : Level 1 0 1 0 : Level 2 0 1 1 : Level 3 1 0 0 : Level 4 1 0 1 : Level 5 1 1 0 : Level 6 1 1 1 : Level 7 b2 b1 b0 0 RW RW RW RW(1) (b7-b4) RW RW RW RW RW RW(1) RW (b7-b6) Nothing is assigned. When write, set to “0”. When read, its content is indeterminate. (b5) 10.1 Interrupt Overview |
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