R8C datasheet(85/199 Pages) RENESAS

85 / 199 page

R8C/10 Group

Rev.1.20 Jan 27, 2006

page 75 of 180

REJ09B0019-0120

Figure 12.21 PUM Register and TCSS Register

Bit name

Function

Bit symbol

Timer Y, Z waveform output control register

Symbol

Address

After reset

PUM

008416

0016

b7 b6 b5 b4 b3 b2 b1 b0

NOTES:

1. The INOSEG bit is valid only when the INT0PL bit in the INTEN register is "0" (one-edge).

2. The INOSGT bit must be set to "1" after the INT0EN bit in the INTEN register and the INOSEG bit in the PUM register

are set.

TYOPL

TZOPL

INOSEG

INOSTG

INT0 pin one-shot trigger

polarity select bit(1)

Timer Z output level

latch

Timer Y output level

latch

INT0 pin one-shot trigger

control bit(2)

Function varies depending on the operation mode

0 : Edge trigger at falling edge

1 : Edge trigger at rising edge

(Timer Z)

0 : INT0 pin one-shot trigger invalid

1 : INT0 pin one-shot trigger valid

(b3-b0)

Reserved bit

Set to “0”

Bit name

Function

Bit symbol

Timer X count source

select bit(1)

b1 b0

TXCK1

TXCK0

TYCK0

Timer Y count source

select bit(1)

TZCK0

TYCK1

TZCK1

Must be set to “0”

(b7-b6)

Reserved bit

Timer Z count source

select bit(1)

NOTES:

1. Avoid switching a count source, while a counter is in progress. Timer counter must be stopped before switching a count

source.

Timer count source setting register

Symbol

Address

After reset

TCSS

008E16

0016

b7 b6 b5 b4 b3 b2 b1 b0

0 0 : f1

0 1 : f8

1 0 : f32

1 1 : f2

b3 b2

0 0 : f1

0 1 : f8

1 0 : fRING

1 1 : Selects input from CNTR1 pin

b5 b4

0 0 : f1

0 1 : f8

1 0 : Selects Timer Y underflow

1 1 : f2

12.3 Timer (Timer Z)

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