R8C datasheet(30/199 Pages) RENESAS

30 / 199 page

R8C/10 Group

Rev.1.20 Jan 27, 2006

page 20 of 180

REJ09B0019-0120

b7b6b5b4b3b2b1b0

OCD0

OCD1

OCD2

OCD3

Oscillation stop detection register(1)

SymbolAddressAfter reset

OCD

000C16

0416

Bit name

Function

Bit symbol

System clock select bit(6)

0 0: The function is disabled(4)

0 1: Avoid this setting

1 0: Avoid this setting

1 1: The function is enabled(7)

0: Select main clock(7)

1: Select on-chip oscillator clock(2)

0: Main clock on

1: Main clock off

Oscillation stop

detection enable bit

Clock monitor bit(3, 5)

Reserved bit

Set to "0"

NOTES:

1. Set the PRC0 bit in the PRCR register to “1” (write enable) before rewriting this register.

2. The OCD2 bit is set to “1” (selecting on-chip oscillator clock) automatically if a main clock oscillation stop

is detected while the OCD1 to OCD0 bits are set to “112” (oscillation stop detection function disabled). If

the OCD3 bit is set to “1” (main clock stop), the OCD2 bit remains unchanged when trying to write “0”

(selecting main clock).

3. The OCD3 bit is enabled when the OCD1 to OCD0 bits are set to “112” (oscillation stop detection function

enabled).

4. The OCD1 to OCD0 bits must be set to “002” (oscillation stop detection function disabled) before entering

stop mode or on-chip oscillator mode (main clock stops).

5. The OCD3 bit remains set to “0” (main clock on) if the OCD1 to OCD0 bits are set to “002”.

6. The CM14 bit goes to “0” (on-chip oscillator on) if the OCD2 bit is set to “1” (selecting on-chip oscillator

clock).

7. Refer to Figure 6.6 “switching clock source from on-chip oscillator to main clock” for the switching

procedure when the main clock re-oscillates after detecting an oscillation stop.

b1 b0

(b7-b4)

Figure 6.3 OCD Register

6. Clock Generation Circuit

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