H8SXSLASH1663R datasheet(397/1504 Pages) RENESAS

397 / 1504 page

Section 9 Bus Controller (BSC)

Rev. 2.00 Sep. 24, 2008 Page 365 of 1468

REJ09B0412-0200

9.15

Write Data Buffer Function

9.15.1

Write Data Buffer Function for External Data Bus

This LSI has a write data buffer function for the external data bus. Using the write data buffer

function enables internal accesses in parallel with external writes or DMAC single address

transfers. The write data buffer function is made available by setting the WDBE bit to 1 in BCR1.

Figure 9.104 shows an example of the timing when the write data buffer function is used. When

this function is used, if an external address space write or a DMAC single address transfer

continues for two cycles or longer, and there is an internal access next, an external write only is

executed in the first two cycles. However, from the next cycle onward, internal accesses (on-chip

memory or internal I/O register read/write) and the external address space write rather than

waiting until it ends are executed in parallel.

On-chip memory read

Peripheral module read

Peripheral module address

External write cycle

On-chip

memory 2

On-chip

memory 1

External address

Internal

address bus

Address bus

CSn

LHWR, LLWR

D15 to D0

Write to

external

space

Figure 9.104 Example of Timing when Write Data Buffer Function is Used

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