H8SXSLASH1663R datasheet(456/1504 Pages) RENESAS

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Section 10 DMA Controller (DMAC)

Rev. 2.00 Sep. 24, 2008 Page 424 of 1468

REJ09B0412-0200

While data is being transferred, DDAR must be accessed in longwords. If the upper word and

lower word are read separately, incorrect data may be read from since the contents of DDAR

during the transfer may be updated regardless of the access by the CPU. Moreover, DDAR for the

channel being transferred must not be written to.

(3)

DMA Transfer Count Register (DTCR)

A DMA transfer decrements the contents of DTCR by the transferred bytes. When byte data is

transferred, DTCR is decremented by 1. When word data is transferred, DTCR is decremented by

2. When longword data is transferred, DTCR is decremented by 4. However, when DTCR = 0, the

contents of DTCR are not changed since the number of transfers is not counted.

While data is being transferred, all the bits of DTCR may be changed. DTCR must be accessed in

longwords. If the upper word and lower word are read separately, incorrect data may be read from

since the contents of DTCR during the transfer may be updated regardless of the access by the

CPU. Moreover, DTCR for the channel being transferred must not be written to.

When a conflict occurs between the address update by DMA transfer and write access by the CPU,

the CPU has priority. When a conflict occurs between change from 1, 2, or 4 to 0 in DTCR and

write access by the CPU (other than 0), the CPU has priority in writing to DTCR. However, the

transfer is stopped.

(4)

DMA Block Size Register (DBSR)

DBSR is enabled in block or repeat transfer mode. Bits 31 to 16 in DBSR function as BKSZH and

bits 15 to 0 in DBSR function as BKSZ. The BKSZH bits (16 bits) store the block size and repeat

size and its value is not changed. The BKSZ bits (16 bits) function as a counter for the block size

and repeat size and its value is decremented every transfer by 1. When the BKSZ value is to

change from 1 to 0 by a DMA transfer, 0 is not stored but the BKSZH value is loaded into the

BKSZ bits.

Since the upper 16 bits of DBSR are not updated, DBSR can be accessed in words.

DBSR for the channel being transferred must not be written to.

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