H8SXSLASH1663R datasheet(568/1504 Pages) RENESAS

568 / 1504 page

Section 11 EXDMA Controller (EXDMAC)

Rev. 2.00 Sep. 24, 2008 Page 536 of 1468

REJ09B0412-0200

Address bus

EXDMA write cycle

ETEND

EDDAR

High

Figure 11.60 Timing in Cluster Transfer Write Address Mode

(from Cluster Buffer to External Memory)

11.6.2

Setting of Address Update Mode

The cluster transfer mode transfer is restricted by the address update mode function. There are the

following four address update methods: increment, decrement, fixed, and offset addition.

When the address increment method is specified and if the specified address is not at the address

boundary for the data access size (odd address for a word-size transfer, address beyond the 4n

boundary for a longword-size transfer), the bus cycle is divided for transfer until the address

becomes at the address boundary. When the address matches the boundary, transfer is processed in

units of data access sizes. At the end of transfer, the bus cycle is divided again to transfer the

remaining data in cluster transfer mode.

With address decrement, fixed, or offset addition method, specify the address, that matches the

address boundary for the data access size, in EDSAR and EDDAR. When specifying the address,

that is not at the address boundary for the data access size, in EDSAR and EDDAR, fix the lower

bit to 0 (lower one bit for a word-size transfer, and lower two bits for a longword-size transfer) in

the address register so that the transfer is processed in units of data access sizes. The block transfer

mode must be used for transfer of data by dividing the bus cycle according to the address

boundary.

When the EDTCR value is smaller than the cluster size, a transfer size error occurs. In this case,

when the TSEIE bit in EDMDR is cleared to 0, the cluster transfer mode is switched to the block

transfer mode to process the remaining data. With the decrement, fixed, or offset addition method,

transfer is performed without fixing the lower bit to 0.

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