PIC18F44J10 datasheet(48/368 Pages) MICROCHIP

48 / 368 page

PIC18F45J10 FAMILY

DS39682E-page 46

5.7

Reset State of Registers

Most registers are unaffected by a Reset. Their status

is unknown on POR and unchanged by all other

Resets. The other registers are forced to a “Reset

state” depending on the type of Reset that occurred.

Most registers are not affected by a WDT wake-up,

since this is viewed as the resumption of normal

operation. Status bits from the RCON register (CM, RI,

TO, PD, POR and BOR) are set or cleared differently in

different Reset situations, as indicated in Table 5-1.

These bits are used in software to determine the nature

of the Reset.

Table 5-2 describes the Reset states for all of the

Special Function Registers. These are categorized by

Power-on and Brown-out Resets, Master Clear and

WDT Resets and WDT wake-ups.

TABLE 5-1:

STATUS BITS, THEIR SIGNIFICANCE AND THE INITIALIZATION CONDITION FOR

RCON REGISTER

Condition

Program

Counter(1)

RCON Register

STKPTR Register

POR

BOR(2) STKFUL

STKUNF

Power-on Reset

0000h

RESET

instruction

0000h

Brown-out Reset

0000h

Configuration Mismatch Reset

0000h

MCLR Reset during

power-managed Run modes

0000h

MCLR Reset during

power-managed Idle modes

and Sleep mode

0000h

MCLR Reset during full-power

execution

0000h

Stack Full Reset (STVREN = 1)

0000h

Stack Underflow Reset

(STVREN = 1)

0000h

Stack Underflow Error (not an

actual Reset, STVREN = 0)

0000h

WDT time-out during full-power

or power-managed Run modes

0000h

WDT time-out during

power-managed Idle or Sleep

modes

PC + 2

Interrupt exit from

power-managed modes

PC + 2

Legend: u

= unchanged

Note 1:

When the wake-up is due to an interrupt and the GIEH or GIEL bit is set, the PC is loaded with the interrupt

vector (0008h or 0018h).

BOR is not available on PIC18LF2XJ10/4XJ10 devices.

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