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PIC18F44J10 Datenblatt(PDF) 9 Page - Microchip Technology |
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PIC18F44J10 Datenblatt(HTML) 9 Page - Microchip Technology |
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9 / 368 page ![]() © 2009 Microchip Technology Inc. DS39682E-page 7 PIC18F45J10 FAMILY 1.0 DEVICE OVERVIEW This document contains device specific information for the following devices: This family offers the advantages of all PIC18 microcontrollers – namely, high computational perfor- mance at an economical price. The PIC18F45J10 family introduces design enhancements that make these micro- controllers a logical choice for many high-performance, power sensitive applications. 1.1 Core Features 1.1.1 LOW POWER All of the devices in the PIC18F45J10 family incorporate a range of features that can significantly reduce power consumption during operation. Key items include: • Alternate Run Modes: By clocking the controller from the Timer1 source or the internal oscillator block, power consumption during code execution can be reduced by as much as 90%. • Multiple Idle Modes: The controller can also run with its CPU core disabled but the peripherals still active. In these states, power consumption can be reduced even further, to as little as 4% of normal operation requirements. • On-the-Fly Mode Switching: The power- managed modes are invoked by user code during operation, allowing the user to incorporate power-saving ideas into their application’s software design. • Low Consumption in Key Modules: The power requirements for both Timer1 and the Watchdog Timer are minimized. See Section 24.0 “Electrical Characteristics” for values. 1.1.2 MULTIPLE OSCILLATOR OPTIONS AND FEATURES All of the devices in the PIC18F45J10 family offer three different oscillator options. These include: • Two Crystal modes, using crystals or ceramic resonators • Two External Clock modes • INTRC source (approximately 31 kHz) Besides its availability as a clock source, the internal oscillator block provides a stable reference source that gives the family additional features for robust operation: • Fail-Safe Clock Monitor: This option constantly monitors the main clock source against a refer- ence signal provided by the internal oscillator. If a clock failure occurs, the controller is switched to the internal oscillator block, allowing for continued low-speed operation or a safe application shutdown. • Two-Speed Start-up: This option allows the internal oscillator to serve as the clock source from Power-on Reset, or wake-up from Sleep mode, until the primary clock source is available. • PIC18F24J10 • PIC18LF24J10 • PIC18F25J10 • PIC18LF25J10 • PIC18F44J10 • PIC18LF44J10 • PIC18F45J10 • PIC18LF45J10 |
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