TMP320C6720RFP300 datasheet(4/118 Pages) TI

4 / 118 page

1.2.1 Device Compatibility

TMS320C6727B, TMS320C6726B, TMS320C6722B, TMS320C6720

Floating-Point Digital Signal Processors

SPRS370E – SEPTEMBER 2006 – REVISED JULY 2008

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Real-Time Interrupt Timer (RTI). The real-time interrupt timer module includes:

• Two 32-bit counter/prescaler pairs

• Two input captures (tied to McASP direct memory access [DMA] events for sample rate measurement)

• Four compares with automatic update capability

• Digital Watchdog (optional) for enhanced system robustness

Clock Generation (PLL and OSC). The C672x DSP includes an on-chip oscillator that supports crystals

in the range of 12 MHz to 25 MHz. Alternatively, the clock can be provided externally through the CLKIN

pin.

The DSP includes a flexible, software-programmable phase-locked loop (PLL) clock generator. Three

different clock domains (SYSCLK1, SYSCLK2, and SYSCLK3) are generated by dividing down the PLL

output. SYSCLK1 is the clock used by the CPU, memory controller, and memories. SYSCLK2 is used by

the peripheral subsystem and dMAX. SYSCLK3 is used exclusively for the EMIF.

The TMS320C672x floating-point digital signal processors are based on the new C67x+ CPU. This core is

code-compatible with the C67x CPU core used on the TMS320C671x DSPs, but with significant

enhancements including additional floating-point instructions. See Section 2.2

TMS320C6727B, TMS320C6726B, TMS320C6722B, TMS320C6720 DSPs

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