TMP320C6720RFP300 datasheet(65/118 Pages) TI

65 / 118 page

TMS320C6727B, TMS320C6726B, TMS320C6722B, TMS320C6720

Floating-Point Digital Signal Processors

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SPRS370E – SEPTEMBER 2006 – REVISED JULY 2008

Table 4-18. UHPI Read and Write Switching Characteristics(1)(2)

NO.

PARAMETER

MIN

MAX

UNIT

Case 1. HPIC or HPIA read

Case 2. HPID read with no

9 * 2H + 20(3)

auto-increment

Case 3. HPID read with

td(DSL-HDV)

Delay time, DS low to HD valid

auto-increment and read FIFO

9 * 2H + 20(3)

initially empty

Case 4. HPID read with

auto-increment and data previously

prefetched into the read FIFO

tdis(DSH-HDV)

Disable time, HD high-impedance from DS high

ten(DSL-HDD)

Enable time, HD driven from DS low

td(DSL-HRDYH)

Delay time, DS low to UHPI_HRDY high

td(DSH-HRDYH)

Delay time, DS high to UHPI_HRDY high

Case 1. HPID read with no

10 * 2H + 20(3)

auto-increment

Delay time, DS low to UHPI_HRDY

td(DSL-HRDYL)

Case 2. HPID read with

low

auto-increment and read FIFO

10 * 2H + 20(3)

initialy empty

td(HDV-HRDYL)

Delay time, HD valid to UHPI_HRDY low

Case 1. HPIA write

5 * 2H + 20(3)

Delay time, DS high to

Case 2. HPID read with

td(DSH-HRDYL)

UHPI_HRDY low

auto-increment and read FIFO

5 * 2H + 20(3)

initially empty

Delay time, DS low to UHPI_HRDY low for HPIA write and FIFO not

td(DSL-HRDYL)

40 * 2H + 20(3)

empty

td(HASL-HRDYH)

Delay time, UHPI_HAS low to UHPI_HRDY high

(1)

H = 0.5 * SYSCLK2 period

(2)

DS refers to HSTROBE. HAD refers to UHPI_HCNTL[0], UHPI_HCNTL[1], UHPI_HHWIL, and UHPI_HRW.

(3)

Max delay is a best case, assuming no delays due to resource conflicts between UHPI and dMAX or CPU. UHPI_HRDY should always

be used to indicate when an access is complete instead of relying on these parameters.

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