AD7938BCPZ datasheet(18/36 Pages) AD

18 / 36 page

AD7938/AD7939

Data Sheet

Rev. C | Page 18 of 36

CIRCUIT INFORMATION

The AD7938/AD7939 are fast, 8-channel, 12-bit and 10-bit,

single-supply, successive approximation analog-to-digital

converters. The parts can operate from a 2.7 V to 5.25 V

power supply and feature throughput rates up to 1.5 MSPS.

The AD7938/AD7939 provide the user with an on-chip track-

and-hold, an accurate internal reference, an analog-to-digital

converter, and a parallel interface housed in a 32-lead LFCSP or

TQFP package.

The AD7938/AD7939 have eight analog input channels that

can be configured to be eight single-ended inputs, four fully

differential pairs, four pseudo differential pairs, or seven pseudo

differential inputs with respect to one common input. There is

an on-chip user-programmable channel sequencer that allows

the user to select a sequence of channels through which the

ADC can progress and cycle with each consecutive falling edge

of CONVST.

The analog input range for the AD7938/AD7939 is 0 V to VREF

or 0 V to 2 × VREF, depending on the status of the RANGE bit in

the control register. The output coding of the ADC can be either

binary or twos complement, depending on the status of the

CODING bit in the control register.

The AD7938/AD7939 provide flexible power management

options to allow the user to achieve the best power performance

for a given throughput rate. These options are selected by

programming the power management bits, PM1 and PM0, in

the control register.

CONVERTER OPERATION

The AD7938/AD7939 are successive approximation ADCs

based around two capacitive digital-to-analog converters

(DACs). Figure 15 and Figure 16 show simplified schematics of

the ADC in acquisition and conversion phase, respectively. The

ADC comprises control logic, an SAR, and two capacitive DACs.

Both figures show the operation of the ADC in differential/pseudo

differential mode. Single-ended mode operation is similar but

VIN− is internally tied to AGND. In acquisition phase, SW3 is

closed, SW1 and SW2 are in Position A, the comparator is held

in a balanced condition, and the sampling capacitor arrays

acquire the differential signal on the input.

VIN+

VIN–

SW1

SW3

COMPARATOR

CONTROL

LOGIC

CAPACITIVE

DAC

CAPACITIVE

DAC

VREF

SW2

Figure 15. ADC Acquisition Phase

When the ADC starts a conversion (Figure 16), SW3 opens and

SW1 and SW2 move to Position B, causing the comparator to

become unbalanced. Both inputs are disconnected once the

conversion begins. The control logic and the charge redistribution

DACs are used to add and subtract fixed amounts of charge

from the sampling capacitor arrays to bring the comparator

back into a balanced condition. When the comparator is

rebalanced, the conversion is complete. The control logic

generates the output code of the ADC. The output impedances

of the sources driving the VIN+ and the VIN− pins must match;

otherwise, the two inputs have different settling times, resulting

in errors.

VIN+

VIN–

SW1

SW3

COMPARATOR

CONTROL

LOGIC

CAPACITIVE

DAC

CAPACITIVE

DAC

VREF

SW2

Figure 16. ADC Conversion Phase

ADC TRANSFER FUNCTION

The output coding for the AD7938/AD7939 is either straight

binary or twos complement, depending on the status of the

CODING bit in the control register. The designed code

transitions occur at successive LSB values (1 LSB, 2 LSBs, and

so on) and the LSB size is VREF/4,096 for the AD7938 and

VREF/1,024 for the AD7939. The ideal transfer characteristics

of the AD7938/AD7939 for both straight binary and twos

complement output coding are shown in Figure 17 and Figure 18,

respectively.

000...000

111...111

1 LSB = VREF/4096 (AD7938)

1 LSB = VREF/1024 (AD7939)

1 LSB

+VREF – 1 LSB

ANALOG INPUT

NOTES

1. VREF IS EITHER VREF OR 2 × VREF.

000...001

000...010

111...110

111...000

011...111

Figure 17. AD7938/AD7939 Ideal Transfer Characteristic

with Straight Binary Output Coding

AD7938BCPZ Datenblatt(PDF) 18 Page - Analog Devices

AD7938BCPZ Datenblatt(HTML) 18 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36

Datenblatt Download

Link URL