LM5037MTSLASHNOPB datasheet(5/40 Pages) TI

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LM5037

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SNVS578D – NOVEMBER 2008 – REVISED MAY 2015

6.5 Electrical Characteristics

over operating free-air temperature range, VVIN = 48 V, VVCC = 10 V, RRT1/SYNC = 30.1 kΩ, RRT2 = 30.1 kΩ, VUVLO = 3 V (unless

otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

STARTUP REGULATOR (VCC PIN)

IVCC = 10 mA

7.4

VVCC

VCC voltage

IVCC = 10 mA, TA = 25°C

7.7

VVCC = 7 V

IVCC(lim)

VCC current limit

VVCC = 7 V, TA = 25°C

VCC Reg-

VVIN = VVCC

0.2

VCC undervoltage threshold

VVCC(UV)

VCC Reg-

VVIN = VVCC, TA = 25°C

0.1

Hysteresis

1.5

VVIN = 100 V, VUVLO = 0 V

430

VVIN = 100 V, VUVLO = 0 V,

350

TA = 25°C

IVIN

Startup regulator current

µA

VVIN = 48 V, VUVLO = 0 V

370

VVIN = 48 V, VUVLO = 0 V, TA = 25°C

325

Output pins and COMP = Open

5.5

Supply current into VCC from

IVCC

Output pins and COMP = Open,

external source

TA = 25°C

VOLTAGE REFERENCE REGULATOR (REF PIN)

IREF = 0 mA

4.75

5.15

REF pin voltage

IREF = 0 mA, TA = 25°C

VREF

0 A

≤ IREF ≤ 2.5 mA

REF voltage regulation

0 A

≤ IREF ≤ 2.5 mA, TA = 25°C

VREF = 4.5 V

IREF(lim)

REF current limit

VREF = 4.5 V, TA = 25°C

3.7

4.3

VREF undervoltage threshold

TA = 25°C

VREF(UV)

Hysteresis

0.35

UNDERVOLTAGE LOCKOUT AND SHUTDOWN (UVLO PIN)

1.20

1.295

TA = 25°C

1.25

VUVLO

Undervoltage lockout threshold

UVLO voltage rising

0.37

0.47

UVLO voltage rising, TA = 25°C

0.42

Hysteresis voltage

0.1

UVLO pin sinking

IUVLO

Hysteresis current

µA

UVLO pin sinking, TA = 25°C

CURRENT SENSE INPUT (CS PIN)

0.22

0.29

VCS

Current limit threshold

TA = 25°C

0.25

tDLY(CS)

CS delay to output(1)

VCS rising from zero to 1 V. No load.

tBLK(CS)

Leading edge blanking time at CS

RCS(sink)

CS sink impedance (clocked)(2)

TA = 25°C

(1)

Time for OUTA pin and OUTB pin to fall to 90% of VCC.

(2)

Internal FET sink impedance.

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