LM5037

SNVS578D – NOVEMBER 2008 – REVISED MAY 2015

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7.3 Feature Description

7.3.1 High-Voltage Start-Up Regulator

The LM5037 device contains an internal high voltage, start-up regulator that allows the input pin (VIN) to be

connected directly to the supply voltage over a range of 13V to a maximum of 100 V. The regulator input can

withstand transients up to 105 V. The regulator output at VCC (7.7 V) is internally current limited with a minimum

of 45 mA. When the UVLO pin potential is greater than 0.45 V, the VCC regulator is enabled to charge an

external capacitor connected to the VCC pin. The VCC regulator provides power to the voltage reference (REF)

and the gate drivers (OUTA and OUTB). When the voltage on the VCC pin exceeds its undervoltage (VCC UV)

threshold, the internal voltage reference (REF) reaches its regulation set point of 5 V and the UVLO voltage is

greater than 1.25 V, the controller outputs are enabled. The value selected for the VCC capacitor depends on the

total system design, and its start-up characteristics. The recommended range of values for the VCC capacitor

between 0.47 µF and 10 µF.

Powering VCC from an external supply can reduce the internal power dissipation of the device. In typical

applications, an auxiliary transformer winding is connected through a diode to the VCC pin. This winding must

raise the VCC voltage above 8.1 V to shut off the internal start-up regulator. Powering VCC from an auxiliary

winding improves efficiency while reducing the controller’s power dissipation. The VCC UV circuit function

remains in this mode, requiring that VCC never falls below its nominal threshold during the start-up sequence.

The VCC regulator series pass transistor includes a diode between VCC and VIN that should not be forward

biased in normal operation. Therefore the auxiliary VCC voltage should never exceed the VIN voltage.

An external DC bias voltage can be used instead of the internal regulator by connecting the external bias voltage

to both the VCC and the VIN pins. In this particular case, the external bias must be greater than maximum VCC

pin regulation of 8 V and less than the VCC maximum operating voltage rating (15 V).

7.3.2 Reference

The REF pin is the output of a 5-V linear regulator that can be used to bias an opto-coupler transistor and

external housekeeping circuits. The regulator output is internally current limited to 10 mA (typical).

7.3.3 Error Amplifier

An internal high gain error amplifier is provided within the LM5037. The non-inverting amplifier reference is tied to

a 1.25 V reference. In non-isolated applications the power converter output is connected to the FB pin via the

voltage setting resistors and loop compensation is connected between the COMP and FB pins. A typical

gain/phase plot is shown in the Typical Characteristics section.

For most isolated applications the error amplifier function is implemented on the secondary side. Since the

internal error amplifier is configured as an open drain output, it can be disabled by connecting FB to ground. The

internal, 5-k

Ω pull-up resistor connected between the COMP pin and the 5-V reference can be used as the pull-

up for an opto-coupler or other isolation device .

7.3.4 Cycle-By-Cycle Current Limit

The CS pin is to be driven by a signal representative of the transformer primary current. The current sense signal

can be generated by using a sense resistor or a current sense transformer. If the voltage sensed at the CS pin

exceeds 0.25 V, the current sense comparator terminates the output driver pulse. If the high current condition

persists, the controller operates in a cycle-by-cycle current limit mode with duty cycle determined by the current

sense comparator instead of the PWM comparator. Cycle-by-cycle current limiting may eventually trigger the

hiccup mode restart cycle; depending on the configuration of the RES pin (see Overload Protection Timer

section). To suppress noise, a small R-C filter connected to the CS pin and located near the controller is

recommended. An internal, 21-

Ω MOSFET discharges the external current sense filter capacitor at the

conclusion of every cycle. The discharge MOSFET remains on for an additional 65 ns after either OUTA or

OUTB driver switches high to blank leading edge transients in the current sensing circuit. Discharging the CS pin

filter each cycle and blanking leading edge spikes reduces the filtering requirements and improves the current

sense response time. The current sense comparator is very fast and may respond to short duration noise pulses.

Layout considerations are critical for the current sense filter and sense resistor. The capacitor associated with the

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