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LM5037MT/NOPB Datenblatt(PDF) 14 Page - Texas Instruments |
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LM5037MT/NOPB Datenblatt(HTML) 14 Page - Texas Instruments |
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14 / 40 page ![]() CFF Vin SLOPE PROPORTIONAL TO Vin RAMP COMP Gate Drive 1V CLK RFF VIN LM5037 LM5037 SNVS578D – NOVEMBER 2008 – REVISED MAY 2015 www.ti.com Feature Description (continued) Figure 12. Feed-Forward Voltage Mode Configuration 7.3.9 Current Mode The LM5037 device can be configured for current mode control by injecting a signal representative of primary current into the RAMP pin. One way to achieve this is shown in Figure 13. Filter components Rfilter and Cfilter are used to filter leading edge noise spikes. The signal at the CS pin is thus a ramp on a pedestal. The pedestal corresponds to the continuous conduction current in the transformer at the beginning of an OUTA or OUTB conduction cycle. The R-C circuit (RSlope and CSlope), shown in Figure 13, tied to VREF adds an additional ramp to the current sense signal. This additional ramp signal, known as slope compensation, is required to avoid instabilities at duty cycles above 50% (25% per phase). The compensated RAMP signal consists of two parts, the primary current signal and the slope compensation. The compensated RAMP signal is compared to the error signal by the PWM comparator to control the duty cycle of the outputs. The RAMP capacitor and CS capacitor are reset through internal discharge FETs. The on-resistance (RDS(on)) of RAMP discharge FET is 5 Ω (typical); this ensures fast discharge of the RAMP reset capacitor. Any dc voltage source can be used in place of VREF to generate the slope compensation ramp. The timing diagram shown in Figure 14 depicts the current mode waveforms and relative timing. When OUTA or OUTB is enabled, the signal at the RAMP pin consists of the CS pin signal (current ramp on a pedestal) plus the slope compensation ramp (dotted lines). When OUTA or OUTB is turned off, the primary current component is absent but the voltage at the RAMP pin continues to rise due to slope compensation component until the end of the clock period, after which it is reset by the RAMP discharge FET. A component selection example is explained in detail in the Application and Implementation section. 14 Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated Product Folder Links: LM5037 |
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