STM32F101XF datasheet(98/117 Pages) STMICROELECTRONICS

98 / 117 page

Electrical characteristics

STM32F101xF, STM32F101xG

98/117

DocID16553 Rev 5

DAC_OUT

min(2)

Lower DAC_OUT

voltage with buffer

0.2

It gives the maximum output

excursion of the DAC.

It corresponds to 12-bit input

code (0x0E0) to (0xF1C) at

VREF+ = 3.6 V and (0x155)

and (0xEAB) at VREF+ = 2.4 V.

DAC_OUT

max(2)

Higher DAC_OUT

voltage with buffer

VDDA –

0.2

DAC_OUT

min(2)

Lower DAC_OUT

voltage with buffer

OFF

-0.5

It gives the maximum output

excursion of the DAC.

DAC_OUT

max(2)

Higher DAC_OUT

voltage with buffer

OFF

VREF+ –

1LSB

IDDVREF+

DAC DC current

consumption in

quiescent mode

(Standby mode)

220

µA

With no load, worst code

(0xF1C) at VREF+ = 3.6 V in

terms of DC consumption on

the inputs.

IDDA

DAC DC current

consumption in

quiescent mode(3)

380

µA

With no load, middle code

(0x800) on the inputs.

480

µA

With no load, worst code

(0xF1C) at VREF+ = 3.6 V in

terms of DC consumption on

the inputs.

DNL(1)

Differential non

linearity Difference

between two

consecutive code-

1LSB)

±0.5

LSB

Given for the DAC in 10-bit

configuration.

±2

LSB

Given for the DAC in 12-bit

configuration.

INL(1)

Integral non linearity

(difference between

measured value at

Code i and the value

at Code i on a line

drawn between Code

0 and last Code

1023)

±1

LSB

Given for the DAC in 10-bit

configuration.

±4

LSB

Given for the DAC in 12-bit

configuration.

Offset(1)

Offset error

(difference between

measured value at

Code (0x800) and

the ideal value =

VREF+/2)

±10

mV -

±3

LSB

Given for the DAC in 10-bit at

VREF+ = 3.6 V.

±12

LSB

Given for the DAC in 12-bit at

VREF+ = 3.6 V.

Gain

error(1)

Gain error

±0.5

Given for the DAC in 12bit

configuration.

Table 60. DAC characteristics (continued)

Symbol

Parameter

Conditions

Min

Typ

Max(1) Unit

Comments

STM32F101XF Datenblatt(PDF) 98 Page - STMicroelectronics

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