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SPEAR600 Datenblatt(PDF) 96 Page - STMicroelectronics |
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SPEAR600 Datenblatt(HTML) 96 Page - STMicroelectronics |
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96 / 97 page ![]() Revision history SPEAr600 96/97 Doc ID 16259 Rev 3 09-May-2012 3 Modified FSMC feature on page 1 Figure 2: Typical system architecture using SPEAr600: – Deleted SRAM and ROM blocks which were connected to the FSMC block – Substituted SSP with 3xSSP – Added the RAS block. Section 1.1: Main features on page 9: – Deleted the word “/parallel” from bullet seven (about FSMC) – Replaced SPI with SSP in bullet sixteen. – Modified number of GPIOs to 10 – Added information about RAS (Reconfigurable Array Subsystem) Chapter 2: Architecture overview: reviewed the first introduction part. Section 2.4: Flexible static memory controller: – Updated the introduction. – Main features: changed the sentence “Provides independent chip select for each memory bank" by "Provides only one chip select for the first memory bank" Table 3: Power supply pins: swapped ball R1 from the “Digital ground group” to the “Analog ground group”. Section 2.15: UARTs: corrected the value of the baud rate to 3 Mbps Table 48: Timing characteristics for 8-bit NAND Flash configuration and Table 49: Timing characteristics for 16-bit NAND Flash configuration: added three footnotes. Table 3: Power supply pins: swapped ball R1 from the “Digital ground group” to the “Analog ground group”. Section 2.15: UARTs: corrected the value of the baud rate in 3 Mbps Table 48: Timing characteristics for 8-bit NAND Flash configuration and Table 49: Timing characteristics for 16-bit NAND Flash configuration: added three footnotes. Created the new Section 2.24: Reconfigurable array subsystem connectivity (RAS). Section 3.3: Configuration modes and Section Table 16.: Multiplexing scheme: removed additional PL_GPIOs, PL_CLK signals and renamed GPIOs to EXPI IOs Section 6.6.3: GMII-MII Receive timing specifications: added Table 52: GMII-MII RX timings. Changed parameter TO to TA and added TJ in Table 21: Recommended operating conditions Updated Table 62: SPEAr600 PBGA420 thermal resistance characteristics. Table 63. Document revision history (continued) Date Revision Changes |
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