| Datenblatt-Suchmaschine für elektronische Bauteile |
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TLV9152 Datenblatt(PDF) 31 Page - Texas Instruments |
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TLV9152 Datenblatt(HTML) 31 Page - Texas Instruments |
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31 / 45 page ![]() 10.2 Layout Example + VIN VOUT RG RF Figure 10-1. Schematic Representation NC ±IN +IN V± V+ OUTPUT NC NC VS+ VS± GND Ground (GND) plane on another layer VOUT VIN GND Run the input traces as far away from the supply lines as possible RF RG Place components close to device and to each other to reduce parasitic errors Use low-ESR, ceramic bypass capacitor GND Use a low-ESR, ceramic bypass capacitor Figure 10-2. Operational Amplifier Board Layout for Noninverting Configuration www.ti.com TLV9152-Q1, TLV9154-Q1 SBOSA23B – MAY 2020 – REVISED MARCH 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 31 Product Folder Links: TLV9152-Q1 TLV9154-Q1 |
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