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TLV9152 Datenblatt(PDF) 5 Page - Texas Instruments |
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TLV9152 Datenblatt(HTML) 5 Page - Texas Instruments |
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5 / 45 page ![]() 1 OUT1 14 OUT4 2 IN1± 13 IN4± 3 IN1+ 12 IN4+ 4 V+ 11 V± 5 IN2+ 10 IN3+ 6 IN2± 9 IN3± 7 OUT2 8 OUT3 Not to scale A. D, DYY, and PW packages are preview only. Figure 5-3. TLV9154-Q1 D, DYY, and PW Package(A) 14-Pin SOIC, SOT-23, and TSSOP Top View Table 5-3. Pin Functions: TLV9154-Q1 PIN I/O DESCRIPTION NAME NO. IN1+ 3 I Noninverting input, channel 1 IN1– 2 I Inverting input, channel 1 IN2+ 5 I Noninverting input, channel 2 IN2– 6 I Inverting input, channel 2 IN3+ 10 I Noninverting input, channel 3 IN3– 9 I Inverting input, channel 3 IN4+ 12 I Noninverting input, channel 4 IN4– 13 I Inverting input, channel 4 OUT1 1 O Output, channel 1 OUT2 7 O Output, channel 2 OUT3 8 O Output, channel 3 OUT4 14 O Output, channel 4 V+ 4 — Positive (highest) power supply V– 11 — Negative (lowest) power supply www.ti.com TLV9152-Q1, TLV9154-Q1 SBOSA23B – MAY 2020 – REVISED MARCH 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 5 Product Folder Links: TLV9152-Q1 TLV9154-Q1 |
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