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TLV9152 Datenblatt(PDF) 4 Page - Texas Instruments |
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TLV9152 Datenblatt(HTML) 4 Page - Texas Instruments |
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4 / 45 page ![]() 1 OUT1 8 V+ 2 IN1± 7 OUT2 3 IN1+ 6 IN2± 4 V± 5 IN2+ Not to scale A. D package is preview only. Figure 5-2. TLV9152-Q1 D and DGK Package(A) 8-Pin SOIC and VSSOP Top View Table 5-2. Pin Functions: TLV9152-Q1 PIN I/O DESCRIPTION NAME NO. IN1+ 3 I Noninverting input, channel 1 IN2+ 5 I Noninverting input, channel 2 IN1– 2 I Inverting input, channel 1 IN2– 6 I Inverting input, channel 2 OUT1 1 O Output, channel 1 OUT2 7 O Output, channel 2 V+ 8 — Positive (highest) power supply V– 4 — Negative (lowest) power supply TLV9152-Q1, TLV9154-Q1 SBOSA23B – MAY 2020 – REVISED MARCH 2021 www.ti.com 4 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TLV9152-Q1 TLV9154-Q1 |
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