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TLV9152 Datenblatt(PDF) 6 Page - Texas Instruments |
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TLV9152 Datenblatt(HTML) 6 Page - Texas Instruments |
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6 / 45 page ![]() 6 Specifications 6.1 Absolute Maximum Ratings over operating ambient temperature range (unless otherwise noted) (1) MIN MAX UNIT Supply voltage, VS = (V+) – (V–) 0 20 V Signal input pins Common-mode voltage (3) (V–) – 0.5 (V+) + 0.5 V Differential voltage (3) VS + 0.2 V Current (3) –10 10 mA Output short-circuit (2) Continuous Operating ambient temperature, TA –55 150 °C Junction temperature, TJ 150 °C Storage temperature, Tstg –65 150 °C (1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime. (2) Short-circuit to ground, one amplifier per package. (3) Input pins are diode-clamped to the power-supply rails. Input signals that may swing more than 0.5 V beyond the supply rails must be current limited to 10 mA or less. 6.2 ESD Ratings VALUE UNIT V(ESD) Electrostatic discharge Human-body model (HBM), per AEC Q100-002(1) ±2000 V Charged-device model (CDM), per AEC Q100-011 ±1000 (1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification. 6.3 Recommended Operating Conditions over operating ambient temperature range (unless otherwise noted) MIN MAX UNIT VS Supply voltage, (V+) – (V–) 2.7 16 V VI Input voltage range (V–) – 0.1 (V+) + 0.1 V TA Specified ambient temperature –40 125 °C 6.4 Thermal Information for Single Channel THERMAL METRIC (1) TLV9151-Q1 UNIT DBV (2) (SOT-23) 5 PINS RθJA Junction-to-ambient thermal resistance TBD °C/W RθJC(top) Junction-to-case (top) thermal resistance TBD °C/W RθJB Junction-to-board thermal resistance TBD °C/W ψJT Junction-to-top characterization parameter TBD °C/W ψJB Junction-to-board characterization parameter TBD °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance TBD °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. (2) This package option is preview for TLV9151-Q1. TLV9152-Q1, TLV9154-Q1 SBOSA23B – MAY 2020 – REVISED MARCH 2021 www.ti.com 6 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TLV9152-Q1 TLV9154-Q1 |
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