HMC815BLC5TR-R5 datasheet(28/30 Pages) AD

28 / 30 page

HMC815B

Data Sheet

Rev. 0 | Page 28 of 30

EVALUATION BOARD INFORMATION

The circuit board used in the application must use RF circuit

design techniques. Signal lines must have 50 Ω impedance.

Connect the package ground leads and exposed pad directly to

the ground plane, as shown in Figure 105. Use a sufficient

number of via holes to connect the top and bottom ground

planes. The evaluation circuit board shown in Figure 107 is

available from Analog Devices upon request.

EV1HMC815BLC5 Power-On Sequence

To set up the EV1HMC815BLC5, take the following steps:

1. Power up VGG with a −2 V supply.

2. Power up VDD2 and VDD3 with a 4.5 V supply.

3. Power up VDD1 with another 4.5 V supply.

4. Adjust the VGG supply between −2 V and 0 V until the total

RF supply current (IDD2 + IDD3) = 270 mA.

5. Connect LOIN to the LO signal generator with an LO

power of 4 dBm (typical).

6. Apply the IF1 and IF2 signals.

EV1HMC815BLC5 Power-Off Sequence

To turn off the EV1HMC815BLC5, take the following steps:

1. Turn off the LO and IF signals.

2. Set VGG to −2 V.

3. Set the VDD1, VDD2, and VDD3 supplies to 0 V and then

turn them off.

4. Turn off the VGG supply.

Layout

Solder the exposed pad on the underside of the HMC815B to a low

thermal and electrical impedance ground plane. This exposed

pad is typically soldered to an exposed opening in the solder

mask on the evaluation board. Connect these ground vias to all

other ground layers on the evaluation board to maximize heat

dissipation from the device package. Figure 105 and Figure 106

show the PCB land pattern footprint for the HMC815B and the

solder paste stencil for the HMC815B evaluation board,

respectively.

0.138" SQUARE MASK OPENING

0.02 ×45° CHAMFER FOR PIN1

0.197"

[0.50]

PAD SIZE

0.026" × 0.010"

0.217" SQUARE

0.004" MASK/METAL OVERLAP

0.010" MIN MASK WIDTH

0.010" REF

0.030"

MASK OPENING

0.156"

MASK

OPENING

PIN 1

GROUND PAD

SOLDERMASK

0.146" SQUARE

GROUND PAD

ø.010"

TYPICAL VIA

ø.034"

TYPICAL

VIA SPACING

Figure 105. PCB Land Pattern Footprint

0.219

SQUARE

0.017

0.027

TYP

0.010

TYP

0.0197

TYP

R0.0040 TYP

132 PLCS

0.132

SQUARE

Figure 106. Solder Paste Stencil

HMC815BLC5TR-R5 Datenblatt(PDF) 28 Page - Analog Devices

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