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AX88141 Datenblatt(PDF) 16 Page - ASIX Electronics Corporation |
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AX88141 Datenblatt(HTML) 16 Page - ASIX Electronics Corporation |
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16 / 43 page ![]() AX88141 PRELIMINARY ASIX ELECTRONICS CORPORATION 16 CONFIDENTIAL 3.2.5 Configuration Base I/O Address Register (CBIO) FIELD R/W DESCRIPTION 31:7 R/W Configuration Base I/O Address : Defines the address assignment mapping of AX88141‘s regs. 6:1 R This field value is 0 when read 0 R I/O Space Indicator : Determines that the register maps into the I/O space. The value in this field is 1. Tab - 10 CBIO Configuration Base I/O Address Register Description 3.2.6 Configuration Base Memory Address Register (CBMA) FIELD R/W DESCRIPTION 31:7 R/W Configuration Base Memory Address : Defines the address assignment mapping of AX88141‘s regs. 6:1 R This field value is 0 when read 0 R Memory Space Indicator : Determines that the register maps into the memory space. The value in this field is 0. Tab - 11 CBMA Configuration Base Memory Address Register Description 3.2.7 Expansion ROM Base Address Register (CBER) FIELD R/W DESCRIPTION 31:10 R/W Expansion ROM Base Address 9:1 R This field value is 0 when read 0 R/W Expansion ROM Enable Bit : Active high Tab - 12 CBER Expansion ROM Base Address Register Description 3.2.8 Configuration Interrupt Register (CSIT) FIELD R/W DESCRIPTION 31:24 R MAX_LAT : time unit is equal to 0.25 microsecond.(28H) 23:16 R MIN_GNT : Time unit is equal to 0.25 microsecond.(14H) 15:8 R Interrupt Pin : The AX88141 uses INTA# and the read value is (01H). 7:0 R/W Interrupt Line : The BIOS writes the routing information into this field. Tab - 13 CSIT Configuration Interrupt Register Description 3.2.9 Special Use Register (SUD) FIELD R/W DESCRIPTION 31:30 R Reserved 29 R/W Enable bit, when set to “1”, if GEP LINK pin has transition, PME# will active. 28 R/W This bit will be “1” if GEP LINK pin has transitions. 27 R/W This bit will be “1” if Magic Packet was detected. 26-25 R Reserved 24 R/W Password enable bit, when this bit is set to “1”, AX881401 will check the password from Magic Packet With the stored password in REG 0B and REG 1B before asserting the Magic Packet detected bit (<3> of REG 43) 23-16 R Reserved 15:8 R/W Driver special Use 7-0 R Reserved Tab - 14 CSIT Configuration Interrupt Register Description 3.2.10 Subsystem ID and Subsystem Vendor Register (SSID) FIELD R/W DESCRIPTION 31:16 R Subdsystem ID : Provides the subsystem ID which is loaded from EEPROM at hardware reset 15:0 R Subsystem Vender ID : Provides the subsystem vendor ID which is loaded from EEPROM at hardware reset. |
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