AX88141 datasheet(28/43 Pages) ASIX

28 / 43 page

AX88141

PRELIMINARY

ASIX ELECTRONICS CORPORATION

CONFIDENTIAL

5.0 Host Communication

Descriptor lists and data buffers, collectively called the host communication, reside in the host

memory and manage the actions and status related to buffer management.

5.1 Descriptor Lists and Data Buffers

The AX88141 transfers data frames to the receive buffers and from the transmit buffers in host

memory. Descriptors that reside in the host memory act as pointers to these buffers.

There are two descriptor lists, one for receive and one for transmit. The base address of each list is

written into REG3 and REG4, respectively. A descriptor list is forward-linked (explicitly). The last

descriptor may point back to the first entry to create a ring structure. Explicit chaining of descriptors

is accomplished by setting the address pointer chained in both the receive and transmit descriptors

(RDES3 and TDES3). The descriptor lists reside in the host physical memory address space.

A data buffer consists of either an entire frame or part of a frame, but it cannot exceed a single

frame. Buffers contain only data; buffer status is maintained in the descriptor. Data chaining refers

to frames that span multiple data buffers.

Descriptor Structure Example

Next Descriptor

Fig - 3 Descriptor Structure Example

Buffer 1

Descriptor 0

Buffer 2

Descriptor 1

AX88141 Datenblatt(PDF) 28 Page - ASIX Electronics Corporation