AX88141 datasheet(18/43 Pages) ASIX

Teilenummer	AX88141

Bauteilbeschribung	100BASE-TX/FX PCI BUS FAST ETHERNET MAC CONTROLLER WITH POWER MANAGEMENT

PDF	43 Pages

Scroll/Zoom	100%

Hersteller	ASIX [ASIX Electronics Corporation]

Direct Link	http://www.asix.com.tw

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AX88141

PRELIMINARY

ASIX ELECTRONICS CORPORATION

CONFIDENTIAL

4.0 Registers Operation

The REGs are quad-word aligned, 32-bits long, and must be accessed using long-word

instruction with quad-word aligned addresses only.

Reserved bits should be written with 0.; Reserved bits are UNPREDICTABLE on read access.

Retries on second data transactions occur in response to burst accesses.

4.1 Registers Mapping

MEANING

OFFSET FROM REG BASE ADDRESS

(CBIO,CBMA)

REG0

BUS MODE

00H

REG0B

MAGIC PACKET PASSWORD LOW <31:0>

04H

REG1

TRANSMIT POLL DEMAND

08H

REG1B

MAGIC PACKET PASSWORD HIGH <47:32>

0CH

REG2

RECEIVE POLL DEMAND

10H

REG3

RECEIVE LIST BASE ADDRESS

18H

REG4

TRANSMIT LIST BASE ADDRESS

20H

REG5

STATUS

28H

REG6

OPERATION MODE

30H

REG7

INTERRUPT ENABLE

38H

REG8

MISSED FRAME AND OVERFLOW COUNTER

40H

REG9

SERIAL ROM, AND MII MANAGEMENT

48H

REG10

50H

REG11

GENERAL-PURPOSE TIMER

58H

REG12

GENERAL-PURPOSE PORT

60H

REG13

FILTERING BUFFER INDEX

68H

REG14

FILTERING BUFFER DATA

70H

REG14B

RESERVED

74H

REG15

RESERVED

78H

REG15B

RESERVED

7CH

Tab - 18 Command and Status Register Mapping

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