SC475AEVB datasheet(11/27 Pages) SEMTECH

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SC475A

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POWER MANAGEMENT

VOUT Voltage Selection

VOUT voltage is regulated through the FB pin via resistors

R1 through R3 as shown in Figure 4.

TON

0.75V

SC475A

VOUT

Logic

Control

Figure 4

The following table shows the equations for VOUT as a

function of control input G0:

VOUT Equation

0.75 • (1 + R1/R2)

0.75 • (1 + R1/R2 + R1/R3)

Note that the RDSON of the internal D0 mosfet is in series with

R3, which adds typically 15 ohms in series.

Voltage Transitioning

The G0 pin allows VOUT to transition to both higher

and lower values. The two directions have differing

responses.

When doing a down transition, the sudden release of R3

will cause FB to go above the 0.75V threshold. Depending

on the level of VOUT change and the load, the IC responds

in different ways.

At light load conditions when power-save is active, and

when the downward change is 8% or greater, the rapid

change of D0 is large enough to cause FB to rise up to the

Smart Power Save threshold (810mV). DL will then drive

high to turn on the low-side MOSFET and draw current from

the output capacitor via the inductor. DL will remain on

until FB falls to 0.75V, at which point a normal DH switch-

ing cycle begins, see Figure 5. This causes the output to

transition to the new voltage level quickly, typically 10~20

usec. Refer to the Smart Power Save Protection section

for a full description.

A rapid downward change in VOUT also occurs for downward

changes less than 8%, provided the load is high enough

such that power-save is not active. In this case, after D0

opens and FB rises above the 0.75V trip point, DL will drive

high and stay high until FB drops to the trip point.

VOUT

750mV

810mV

(FB threshold)

RTN

VOUT

Initial VOUT

Final VOUT

(Smart Psave threshold)

Figure 5

For the case where the down transition is less than

8%, and the load is light such that power-save is active,

the Smart Power Save detector will not activate. In this

case, with FB already above the 0.75V reference there

is no switching activity. DL and DH will remain off, and

the output voltage will slowly fall as the output capacitors

discharge into the load, see Figure 6.

Applications Information (continued)

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