ACT4921 datasheet(14/35 Pages) QORVO

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Data Sheet Rev. B, January 2020 | Subject to change without notice

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ACT4921

Power Loss Protection with 6A eFuse

FUNCTIONAL DESCRIPTION

General

ACT4921 provides protection, control, and supple-

mental storage for power failure prevention systems.

This functionality goes by many names: Power Loss

Protection (PLP), Power Loss Imminent (PLI) and

Power Failure Protection (PFP). It provides a system

with additional run time after a power failure to all the

system to save critical data before shutting down.

Typical applications include solid state disk drives (SSD)

and servers. In normal operation when input power is

good, the IC connects the input to the output through

the eFuse. This powers the system load from the

system input power. If an input voltage fault occurs, the

IC disconnects the input from the output and enters

supplement mode, where output power comes from the

high voltage storage capacitor power. The internal buck

converter efficiently converts the storage voltage down

to the regulated output voltage. All startup, storage

capacitor charging, and switching between normal and

supplement mode operation is autonomous and does

not require user intervention.

During start up, the ACT4921 limits the output

voltage dV/dt to minimize system level inrush currents.

After softstart is complete, the IC charges the storage

capacitors with the internal boost converter. The IC

automatically recharges the storage capacitors as

needed. The IC contains extensive protection circuitry

to protect against input voltage overvoltage and

undervoltage, output voltage overload and short circuit,

degraded storage capacitors, and thermal overload.

The IC communicates with the host processor via I2C

and GPIOs. The nIRQ pin indicates general faults which

can be read by the host processor via I2C. A dedicated

power failure pin, PLI, automatically and immediately

goes low to indicate a power loss condition. This gives

the system advanced warning to complete all active

tasks and shutdown. See the Pin Function section for

additional PLI pin functionality.

The ACT4921 is highly flexible and contains many I2C

configurable functions. The IC’s default functionality is

defined by its default CMI (Code Matrix Index), but

much of this functionality can be changed via I2C. I2C

functionality includes storage voltage setting, OV and

UV fault thresholds, switching frequencies, PLI pin func-

tionality, health check settings, and current limits. The

CMI Options section shows the default settings for each

available CMI option. Contact Qorvo for additional infor-

mation about other configurations.

I2C Serial Interface

To ensure compatibility with a wide range of systems,

the ACT4921 uses standard I2C commands. It supports

clock speeds up to 1MHz. The ACT4921 always oper-

ates as a slave device, and can be factory configured to

one of three 7-bit slave addresses. The 7-bit slave ad-

dress is followed by an eighth bit, which indicates

whether the transaction is a read-operation or a write-

operation. Refer to each specific CMI for the IC’s slave

address

7-Bit Slave Address

8-Bit Write

Address

8-Bit Read

Address

0x1Ah

001 1010b

0x34h

0x35h

0x3Ah

011 1010b

0x74h

0x75h

0x5Ah

101 1010b

0xB4h

0xB5h

The I2C packet processing state machine does not have

a timeout function, however, any time the I2C state ma-

chine receives a start bit command, it immediately re-

sets the packet processing, even if it is in the middle of

a valid packet. The I2C functionality is operational in all

states except RESET.

I2C commands are communicated using the SCL and

SDA pins. SCL is the I2C serial clock input. SDA is the

data input and output. SDA is open drain and must have

a pull-up resistor. Signals on these pins must meet

timing requirements in the Electrical Characteristics

Table. For more information regarding the I2C 2-wire

serial

interface,

refer

the

NXP

website:

http://www.nxp.com.

I2C Registers

The ACT4921 contains an array of internal registers that

contain the IC’s basic instructions for setting up the IC

configuration,

output

voltages,

sequencing,

fault

thresholds, fault masks, etc. These registers are what

give the IC its operating flexibility. The two types of

registers are described below.

Basic Volatile – These are R/W (Read and Write) and

RO (Read only). After the IC is powered, the user can

modify

the

R/W

values

change

functionality. Changes in functionality include things like

masking certain faults. The RO registers communicate

IC status such as fault conditions. Any changes to these

registers are lost when power is recycled. The default

values are fixed and cannot be changed by the factory

or the end user.

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