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ACT4921 Datenblatt(PDF) 23 Page - Qorvo, Inc |
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ACT4921 Datenblatt(HTML) 23 Page - Qorvo, Inc |
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23 / 35 page ![]() Data Sheet Rev. B, January 2020 | Subject to change without notice 23 of 35 www.qorvo.com © 2020 Qorvo US, Inc. All rights reserved. ACT4921 Power Loss Protection with 6A eFuse Figure 5: Current Limit Threshold vs RILIM Note that the eFuse current can be measured using the ILIM pin. If eFuse current is measured via the ILIM pin, the measurement circuit must have a high impedance input to minimize errors. The current flowing out of ILIM is 1/20000 of the current through the eFuse. The following equation calculates the eFuse current when measured via the ILIM pin. = 20000 (2) Where RILIM is the current limit resistor in ohms and VILIM is the voltage measured on the ILIM pin in volts. When the eFuse reaches the current limit threshold, it clamps the output current. If the load tries to draw additional current, the eFuse opens. Soft-Start The SS pin controls the eFuse start-up. The SS pin drives a constant 5μA internal current source into the external soft-start capacitor to provide a linear ramping voltage at the SS pin. The output voltage linearly ramps with the SS pin voltage, resulting in a well-controlled linear softstart ramp on VOUT, regardless of the load conditions. The following equation calculates the required soft-start capacitance. 65 (3) Where the TSS is the soft-start time in ms and VOUT is the output voltage. The softstart current must be less than 90% of the programmed eFuse current limit. If the softstart current is greater than 90% of the eFuse current limit, the IC enters the SHUTDOWN state, turns off the eFuse, and then retries to softstart again. The following equation calculates the minimum allowable softstart time. _ ! 0.9 $ (4) Where COUT is the sum of the output capacitance and storage capacitance in mF, VOUT is the output voltage in volts, and IILIM is the eFuse current limit in Amperes programmed by the ILIM resistor. BUCK CONVERTER General Description The ACT4921 contains current-mode, synchronous PWM step-down converter that achieves peak efficiencies of 95%. The buck converter minimizes noise in sensitive applications and allows the use of small external components. It is highly flexible with external component selection and can be reconfigured via I2C registers. External components set the output voltage and compensation while I2C registers set the switching frequency and current limit. The buck converter operates in fixed frequency PWM mode. Its switching frequency is programmable between 562kHz to 2250 kHz via the I2C register BK_FREQ[1:0] which allows the system to be optimized for different applications. It has two peak current limit options of 6A and 10A allowing for further system optimization. Overcurrent is set by a non- I2C bit BKILIM_OPT in register 0x0Eh. Refer to the CMI section at the back of the datasheet for each IC’s specific setting. The buck output voltage is externally programmable between 1.8V and 6V. The buck converter generates a regulated output voltage at the VB pin from the storage capacitors when the IC enters supplement mode. This provides the backup power when the system experiences fault conditions. Note that the buck output voltage goes into the VB pin, through the blocking FET and out of the VOUT pin to the system. After the IC exits the SOFTSTART state, the buck converter is enabled but remains turned off. It automatically turns on when the IC enters supplement mode, and remains on until the storage capacitors discharge to 3.0V. Note that ENB must be pulled high to enable the buck converter. Most systems wait until the system is up and running before enabling the buck and boost with the ENB pin. |
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