Data Sheet

ADRF5060

APPLICATIONS INFORMATION

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Rev. 0 | 13 of 16

The ADRF5060 has two power supply pins (VDD and VSS) and

three control pins (V1, V2, and XC). Figure 26 shows the external

components and connections for the supply and control pins. The

VDD pin and the VSS pin are decoupled with a 100pF capacitor.

The ADRF5060 pinout allows the placement of the decoupling

capacitors close to the device. No other external components are

needed for bias and operation, except DC blocking capacitors on

the RF pins (RFIN, RFOUT, OUTA, OUTB, INA, and INB) when the

RF lines are biased at a voltage different than 0V. Refer to the Pin

Configuration and Function Descriptions section for further details.

Figure 26. Recommended Schematic

APPLICATION EXAMPLES

Due to its unique RF port configuration, the ADRF5060 can be

used to implement complex switching topologies with ease of use

and minimum PCB area. Shown in the Gain Ranging section and

the Transfer Switch section are two examples that can be realized

using the ADRF5060. See Figure 27 for the gain ranging example

and see Figure 29 for the transfer switch example.

Gain Ranging

The gain ranging configuration shown in Figure 27 allows the

ADRF5060 to be configured as a path selector. See the signal path

in Figure 28 and the digital control table in Table 7 for additional

information. This configuration requires two digital control pins. Due

to the wide bandwidth of the ADRF5060, amplifiers that operate at

different frequencies can be implemented as well.

Figure 27. Gain Ranging Block Diagram

Figure 28. Gain Ranging Signal Path

Users can select an amplifier path, through path, or attenuator path

(see Table 7), thus creating a repeatable and compact gain ranging

module.

Table 7. Gain Ranging Application Truth Table

V1

V2

Switch State

High

Low

Amplifier selected

Low

High

Attenuator selected

Low

Low

Through path selected