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ADS5500IPAPR Datenblatt(PDF) 2 Page - Texas Instruments

Teilenummer ADS5500IPAPR
Bauteilbeschribung  14-Bit, 125Msps ANALOG-TO-DIGITAL CONVERTER
PDF  37 Pages
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Hersteller  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

ADS5500IPAPR Datenblatt(HTML) 2 Page - Texas Instruments

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ABSOLUTE MAXIMUM RATINGS
RECOMMENDED OPERATING CONDITIONS
ADS5500
SBAS303F – DECEMBER 2003 – REVISED FEBRUARY 2007
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be
more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
PACKAGE/ORDERING INFORMATION(1)
SPECIFIED
TRANSPORT MEDIA,
PACKAGE
PACKAGE
ORDERING
PRODUCT
PACKAGE LEAD
TEMPERATURE
QUANTITY
DESIGNATOR
MARKING
NUMBER
RANGE
ADS5500IPAP
Tray, 160
–40
°C to 85°C
ADS5500I
ADS5500IPAPR
Tape and Reel, 1000R
HTQFP-64(2)
ADS5500
PAP
PowerPAD
ADS5500CPAP
Tray, 160
0
°C to 70°C
ADS5500C
ADS5500CPAPR
Tape and Reel, 100
(1)
For the most current product and ordering information, see the Package Option Addendum located at the end of this data sheet.
(2)
Thermal pad size: 3,5 mm
× 3,5 mm (min), 4 mm × 4 mm (max). θ
JA = 21.47°C/W and θJC = 2.99°C/W, when used with 2 oz. copper
trace and pad soldered directly to a JEDEC standard four layer 3 in
× 3 in PCB.
over operating free-air temperature range (unless otherwise noted) (1)
ADS5500
UNIT
AVDD to AGND, DRVDD to DRGND
V
Supply voltage
AGND to DRGND
V
Analog input to AGND(2)(2)
–0.3 to Min (AVDD + 0.3 V, 3.6 V)
V
Logic input to DRGND
– 0.3 to DRVDD
V
Digital data output to DRGND
–0.3 to DRVDD
V
0 to 70
Operating temperature range
°C
–40 to 85
Junction temperature
105
°C
Storage temperature range
–65 to 150
°C
(1)
Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied.
(2)
If the input signal can exceed 3.6 V, then a resistor greater than or equal to 25
Ω should be added in series with each of the analog
input pins to support input voltages up to 3.8 V. For input voltages above 3.8 V, the device can only handle transients and the duty cycle
of the overshoot should be limited to less than 5% for inputs up to 3.9 V.
MIN
NOM
MAX
UNIT
SUPPLIES
AVDD
Analog supply voltage
3
3.3
3.6
V
DRVDD
Output driver supply voltage
3
3.3
3.6
V
ANALOG INPUT
Differential input range
2.3
VPP
VCM
Input common-mode voltage(1)
1.45
1.55
1.65
V
DIGITAL OUTPUT
Maximum output load
10
pF
CLOCK INPUT
ADCLK input sample rate (sine DLL ON
60
125
Msps
wave) 1/tC
DLL OFF
2
80
Clock amplitude, sine wave, differential (see Figure 50 for more information)
1
3
VPP
(1)
Input common-mode should be connected to CM.
2
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